A43L8316AV AMICC [AMIC Technology], A43L8316AV Datasheet - Page 33

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A43L8316AV

Manufacturer Part Number
A43L8316AV
Description
128K X 16 Bit X 2 Banks Synchronous DRAM
Manufacturer
AMICC [AMIC Technology]
Datasheet
CLOCK
ADDR
A8/AP
Read & Write Cycle with Auto Precharge III @Burst Length=4
(September, 2003, Version 1.0)
(CL=2)
(CL=3)
RAS
CAS
CKE
DQM
CS
BA
DQ
DQ
WE
0
Row Active
(A-Bank)
* Note : Any command to A-bank is not allowed in this period.
Ra
Ra
1
tRP is determined from at auto precharge start point
2
3
Auto Preharge
4
Read with
(A-Bank)
Ca
5
6
Qa0
7
* Note 1
Qa1
Qa0
Auto Precharge
8
Row Active
Start Point
(A-Bank)
(B-Bank)
Qa1
Qa2
Rb
Rb
9
High
32
Qa3
Qa2
Auto Precharge
10
Read with
(B-Bank)
Qa3
Cb
11
12
Qb0
13
Qb1
Qb0
Auto Precharge
14
AMIC Technology, Corp.
Start Point
(B-Bank)
Qb1
Qb2
15
Qb3
Db2
16
Db3
A43L8316A
17
: Don't care
18
19

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