P10C68- ZARLINK [Zarlink Semiconductor Inc], P10C68- Datasheet - Page 4

• Manufacturer Part Number: P10C68-
• Description: CMOS/SNOS NVSRAM HIGH PERFORMANCE 8 K x 8 NON-VOLATILE STATIC RAM
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

P10C68/P11C68
Industrial temperature range
NOTES
4.
5.
6.
AC TEST CONDITIONS
CAPACITANCE
NOTE
7. These parameters are characterised but not 100% tested.
4
Parameter
Input capacitance
Output capacitance
Input pulse levels
Input rise and fall times
Input and output timing reference levels
Output load
Characteristic
Average power supply
current
Average power supply current
during STORE cycle
Average power supply current
(standby, cycling TTL input levels)
Average power supply current
(standby, stable CMOS input levels)
Input leakage current (any input)
Off state output leakage current
Output logic '1' voltage
Output voltage '0' voltage
Test conditions (unless otherwise stated):
Tamb = -40˚C to 70˚C, Vcc = +5V ± 10% (See notes 4, 5 and 6)
I
Bringing E (bar) ≥ V
Mode Selection table.
I
cycle.
CC1
CC2
is dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.
is the average current required for the duration of the STORE cycle (t
T
amb
Symbol
= 25°C, f = 1.0MHz (see note 7)
C
C
OUT
IH
IN
will not produce standby currents levels until any non-volatile cycle in progress has timed out. See
Max.
5
7
Units
pF
pF
Symbol
V
≤5ns
1.5V
See Figure 3
I
I
I
V
I
I
V
I
CC1
CC2
OLK
SB1
SB2
SS
ILK
∆V=0 to 3V
∆V=0 to 3V
OH
OL
Conditions
to 3V
Min.
2.4
Value
OUTPUT
Max.
0.4
80
75
50
27
23
±1
±5
1
STORE
Units
mA
mA
mA
mA
mA
mA
µA
µA
V
V
Ohms
) after the sequence that initiates the
255
t
t
All inputs at V
t
t
E(bar) ≥V
cycling
E (bar)≥(V
inputs at V
0.2V)
V
V
I
I
AVAV
AVAV
AVAV
AVAV
OUT
OUT
CC
CC
= max, V
= max, V
= 4mA
= 8mA
= 35ns
= 45ns
= 35ns
= 45ns
IH
CC
Conditions
IN
, all other inputs
≤0.2V or ≥(V
5.0V
480 Ohms
30p
INCLUDING
SCOPE AND
FIXTURE
IN
-0.2V), all other
IN
IN
≤ 0.2V
= V
= V
SS
SS
to V
to V
CC
CC
CC
-