CMX624P4 CMLMICRO [CML Microcircuits], CMX624P4 Datasheet - Page 8

• Manufacturer Part Number: CMX624P4
• Description: V.23 / Bell 202 Modem
• Manufacturer: CMLMICRO [CML Microcircuits]

V23 / Bell 202 Modem
1.5.4
This block is enabled when bits 1 and 5 of the FSK MODE Register are set to ‘1’, and converts the 75, 150
or 1200 bps FSK input signal to a binary received data signal which is sent to the Rx UART block.
Note that in the absence of a valid FSK signal, the demodulator may falsely interpret speech or other
extraneous signals as data.
1.5.5
The function of this block is controlled by Bits 4 and 5 of the FSK MODE Register and Bit 0 of the TX
TONES Register.
When Bit 0 of the TX TONES Register and Bits 4 and 5 of the FSK MODE Register are set to ‘1’ this block
will measure the frequency and amplitude of the incoming signal. When a signal of 2100Hz is present of
sufficient amplitude and time Bit 4 of the FLAGS Register is set high. See Section 1.7.1 for amplitude,
time and frequency limits.
When Bit 0 of the TX TONES Register is set to ‘0’ this block compares the level of the signal at the output
of the Receive Filter against an internal threshold and may be used as a FSK level detector or a simple
Call Progress Signal detector according to the settings of bits 4 and 5 of the FSK MODE Register, which
affect the Receive Filter pass band as described in Section 1.5.3.
The required register settings are summarised in the table below:
Bit 4 of the FLAGS Register is set to ‘1’ by the output of this block when the received level has exceeded
the threshold for sufficient time. Amplitude and time hysteresis are used to reduce chattering in marginal
conditions.
1.5.6
When bit 7 of the TX TONES Register is set to ‘0’ then this block generates FSK signals as determined by
bits 0 and 1 of the FSK MODE Register and the Tx data bits from the UART block as shown in the tables
below:
V.23 mode (bit 7 of SETUP register = ‘0’):
 2003 CML Microsystems Plc
TX TONES Reg
FSK MODE Reg
Bit 1
FSK Demodulator
Rx Energy and 2100Hz Detector
FSK / DTMF Modulator
0
1
1
Bit 0
0
0
0
1
Bit 0
0
1
x
FSK / DTMF Modulator block output
Disabled (o/p held at V
See Section 1.7.1 for definitions of Teon and Teoff
Figure 4 Rx Energy Detector Timing
(Bit 7 of TX TONES = ‘0’)
Bit 5
0
1
1
1
1200bps FSK
75bps FSK
FSK MODE Reg
8
DD
/ 2)
Bit 4
0
0
1
1
‘0’ (Space)
2100Hz
FSK Signal Frequency
450Hz
-
75 / 150 bps FSK
Detection Mode
1200 bps FSK
Call Progress
‘1’ (Mark)
1300Hz
2100 Hz
390Hz
-
CMX624
D/624/7