P600-27BSCL PLL [PhaseLink Corporation], P600-27BSCL Datasheet
P600-27BSCL
Related parts for P600-27BSCL
P600-27BSCL Summary of contents
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FEATURES • Low phase noise (-145 dBc @ 10kHz offset). • CMOS output with OE tri-state control. • Ultra Low current consumption ( <2mA, at 27MHz, 3.3V) • 52MHz fundamental or 3 • 12mA drive capability at TTL ...
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Internal Pull-up, default value is ‘1’ when not connected. PACKAGE PIN DESCRIPTION Pin No. Name SOT-6 SOIC-8 XIN/FIN DNC 3 - GND 4 2 CLK 5 6 VDD 6 5 DNC 7 - XOUT ...
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AC Electrical Specifications PARAMETERS Input Crystal Frequency Settling time Output Clock Rise/Fall Time VDD sensitivity Output Clock Duty Cycle 3. Jitter and Phase Noise Specifications PARAMETERS RMS Period Jitter (1 sigma – 10,000 samples) Phase Noise relative to carrier ...
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Crystal Specifications PARAMETERS Crystal Resonator Frequency Crystal Loading Rating Maximum Sustainable Drive Level Operating Drive Level C0 (for frequencies below 30MHz) C0 (for frequencies above 30MHz) ESR Note: A detailed crystal specification document is also available for this part ...
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... Note: PhaseLink Supports GREEN Packaging Marking P600-27BSC 8-Pin SOIC (Tube) P600-27BSC 8-Pin SOIC (Tape and Reel) P600-27BSCL 8-Pin SOIC (Tube), GREEN P600-27BSCL 8-Pin SOIC (Tape and Reel), GREEN P600-27BTC 6-Pin SOT (Tape and Reel) PLL600-27B Preliminary NONE= TUBE R= TAPE AND REEL ...