P600-27BSCL PLL [PhaseLink Corporation], P600-27BSCL Datasheet - Page 3

no-image

P600-27BSCL

Manufacturer Part Number
P600-27BSCL
Description
Ultra Low Current XO 10 MHz to 52 MHz
Manufacturer
PLL [PhaseLink Corporation]
Datasheet
2. AC Electrical Specifications
3. Jitter and Phase Noise Specifications
4. DC Specification
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/03/05 Page 3
Input Crystal Frequency
Settling time
Output Clock Rise/Fall Time
VDD sensitivity
Output Clock Duty Cycle
RMS Period Jitter
(1 sigma – 10,000 samples)
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Supply Current, Dynamic,
with Loaded Outputs
(at VDD = 3.3V)
Operating Voltage
Output High Voltage
Output Low Voltage
Output High Voltage at
CMOS level
Output drive current
Short Circuit Current
PARAMETERS
PARAMETERS
PARAMETERS
SYMBOL
V
V
V
V
I
OHC
DD
DD
OH
OL
At power-up
(Vdd reaches 1.62V)
Disable to enable, osc. Off
Disable to enable, osc. On
0.8V ~ 2.0V with 10 pF load
0.3V ~ 3.0V with 15 pF load
Frequency vs. VDD +/- 10%
Measured @ 50% V
With capacitive decoupling
between VDD and GND.
27MHz @100Hz offset
27MHz @1kHz offset
27MHz @10kHz offset
27MHz @100kHz offset
27MHz @1MHz offset
At 10MHz, Cload=15pF
At 13.5MHz, Cload=15pF
At 17.7MHz, Cload=15pF
At 27MHz, Cload=15pF
At 48MHz, Cload=15pF
I
I
I
At TTL level (3.3V)
(3.3V)
CONDITIONS
OH
OL
OH
= 12mA (3.3V)
= -12mA (3.3V)
= -4mA
CONDITIONS
CONDITIONS
Ultra Low Current XO 10 MHz to 52 MHz
DD
MIN.
0.8
10
45
V
DD
MIN.
MIN.
1.62
2.4
12
– 0.4
Preliminary
TYP.
1.15
2.4
50
TYP.
-108
-135
-147
-148
-148
2.1
TYP.
±50
1.3
1.5
1.7
2.3
4.0
17
MAX.
500
PLL600-27B
0.8
52
10
10
55
MAX.
2.5
MAX.
3.63
1.5
1.7
2.0
2.7
4.6
0.4
UNITS
UNITS
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
MHz
ppm
ms
ms
µs
ns
%
ps
UNITS
mA
mA
mA
V
V
V
V

Related parts for P600-27BSCL