16C6N4 RENESAS [Renesas Technology Corp], 16C6N4 Datasheet - Page 69

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16C6N4

Manufacturer Part Number
16C6N4
Description
Renesas MCU
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
M16C/6N Group (M16C/6N4)
Rev.2.40
REJ03B0003-0240
Under development
This document is under development and its contents are subject to change.
Figure 5.17 Timing Diagram (5)
Memory Expansion Mode and Microprocessor Mode
(For 2-wait setting and external area access)
Measuring conditions :
tcyc =
Read timing
Write timing
Aug 25, 2006
ALE
ALE
BCLK
CSi
BHE
RD
DBi
BCLK
CSi
BHE
WR, WRL
WRH
DBi
ADi
ADi
VCC = 5 V
Input timing voltage : V
Output timing voltage : V
f(BCLK)
1
t
25ns.max
d(BCLK-ALE)
t
25ns.max
d(BCLK-ALE)
Hi-Z
page 69 of 88
t
25ns.max
t
25ns.max
t
25ns.max
t
25ns.max
d(BCLK-CS)
d(BCLK-AD)
d(BCLK-CS)
d(BCLK-AD)
tcyc
tcyc
Hi-Z
t
25ns.max
t
-4ns.min
d(BCLK-RD)
t
-4ns.min
h(BCLK-ALE)
h(BCLK-ALE)
IL
OL
= 0.8 V, V
= 0.4 V, V
t
25ns.max
t
40ns.max
d(BCLK-WR)
d(BCLK-DB)
t
(1.5 ✕ tcyc-40)ns.min
d(DB-WR)
(2.5 ✕ tcyc-45)ns.max
IH
OH
t
ac2(RD-DB)
= 2.0 V
= 2.4 V
t
SU(DB-RD)
40ns.min
(0.5 ✕ tcyc-10)ns.min
t
(0.5 ✕ tcyc-10)ns.min
t
h(WR-DB)
h(WR-AD)
t
0ns.min
h(BCLK-WR)
t
0ns.min
t
0ns.min
t
4ns.min
t
4ns.min
t
4ns.min
h(BCLK-RD)
h(RD-DB)
h(BCLK-DB)
h(BCLK-CS)
h(BCLK-AD)
t
0ns.min
t
4ns.min
t
4ns.min
h(BCLK-CS)
h(RD-AD)
h(BCLK-AD)
5. Electric Characteristics (Normal-ver.)
VCC = 5 V

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