TS80C54 ATMEL [ATMEL Corporation], TS80C54 Datasheet - Page 25

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TS80C54

Manufacturer Part Number
TS80C54
Description
8-bit CMOS Microcontroller 16/32 Kbytes ROM/OTP
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
10. Interrupt System
4431E–8051–04/06
INT0
INT1
EXF2
TF0
TF1
TF2
RI
TI
Individual Enable
The TS80C54/58X2 has a total of 7 interrupt vectors: two external interrupts (INT0 and INT1),
three timer interrupts (timers 0, 1 and 2) and the serial port interrupt. These interrupts are shown
in Figure 10-1.
Figure 10-1. Interrupt Control System
Each of the interrupt sources can be individually enabled or disabled by setting or clearing a bit
in the Interrupt Enable register (See Table 10-2.). This register also contains a global disable bit,
which must be cleared to disable all interrupts at once.
Each interrupt source can also be individually programmed to one out of four priority levels by
setting or clearing a bit in the Interrupt Priority register (See Table 10-3.) and in the Interrupt Pri-
ority High register (See Table 10-4.). shows the bit values and priority levels associated with
each combination.
Table 10-1.
A low-priority interrupt can be interrupted by a high priority interrupt, but not by another low-prior-
ity interrupt. A high-priority interrupt can’t be interrupted by any other interrupt source.
IE0
IE1
IPH.x
Priority Level Bit Values
0
0
1
1
IPH, IP
3
0
3
0
3
0
3
0
3
0
3
0
Global Disable
IP.x
0
1
0
1
High priority
interrupt
Interrupt
polling
sequence, decreasing from
high to low priority
AT/TS8xC54/8X2
Low priority
interrupt
Interrupt Level Priority
3 (Highest)
0 (Lowest)
1
2
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