lc74775 Sanyo Semiconductor Corporation, lc74775 Datasheet - Page 15

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lc74775

Manufacturer Part Number
lc74775
Description
Vps/pdc Video On-screen Display
Manufacturer
Sanyo Semiconductor Corporation
Datasheet

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COMMAND6 (Synchronizing signal detection setup command)
• First byte
• Second byte
Note: All registers are set to 0 when the LC74775/M is reset by the RST pin.
DA 0 to 7
DA 0 to 7
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Register
Register
DISLIN
MOD0
SEL0
MUT
RN2
RN1
RN0
SN3
SN2
SN1
SN0
State
State
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
0
0
1
0
1
0
1
0
1
10 lines
Normal output
Second byte identification bit
Command 6 identification code.
Synchronizing signal control setup.
12 lines
CV
SN3
RN2
0
0
0
0
1
SEL0
0
0
0
1
IN
0
0
1
1
is cut and CV
SN2
0
0
0
1
0
RN1
0
0
1
0
SN1
0
0
1
0
0
LC74775, 74775M
MOD0
RN0
0
1
0
1
OUT
0
1
0
0
SN0
Contents
Contents
Function
Function
0
1
0
0
0
is held at the pedestal level
Number of times HSYNC detected
Number of times HSYNC detected
Sliced data width
ST pulse signal
Not output
16 (256)
8 (128)
SEPOUT
0 (32)
4 (64)
CSYNC
128
256
DAV
32
64
External synchronizing signal detection
control.
Signal present
detection.
Sets the sampling period in which SYNC
cannot be detected continuously in the
horizontal synchronizing signal period (1H).
Switches the SEP
Switches the number of lines displayed
CV
External synchronizing signal detection control.
Signal absent
detection.
Sets the sampling period in which SYNC can
be detected continuously in the horizontal
synchronizing signal period (1H).
Values in parentheses apply when RNE0
(COM18) is 1.
OUT
switching
signal present transition
signal absent transition
OUT
Notes
Notes
(pin 19) output
No. 5919-15/35

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