cxa1372bs Sony Electronics, cxa1372bs Datasheet - Page 13

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cxa1372bs

Manufacturer Part Number
cxa1372bs
Description
Rf Signal Processing Servo Amplifier For Cd Player
Manufacturer
Sony Electronics
Datasheet
Description of Functions
Focus Servo
The above figure shows a block diagram of the focus servo.
Ordinarily the FE signal is input to the focus phase compensation circuit through a 20k
however, when DFCT is detected, the FE signal is switched to pass through a low-pass filter formed by the
internal 470k resistance and the capacitance connected to Pin 48. When this DFCT countermeasure circuit is
not used, leave Pin 48 open.
When FS3 is ON, the high-frequency gain can be cut by forming a low-frequency time constant through a
capacitor connected between Pins 2 and 3 and the internal resistor.
The capacitor connected between Pin 4 and GND is a time constant to boost the low frequency in the normal
playback state.
The peak frequency of the focus phase compensation is approximately 1.2kHz when a resistance of 510k
connected to Pin 16.
The focus search level is approximately ±1.1Vp-p when using the constants indicated in the above figure. This
level is inversely proportional to the resistance connected between Pin 17 and GND. However, changing this
resistance also changes the level of the track jump and sled kick as well.
The FZC comparator inverted input is set to 2% of V
FE
510k resistance is recommended for Pin 16.
22k
2200p
0.1µ
10k
0.1µ
46
47
48
3
2
FZC
FE
FGD
FDFCT
FS3
470k
46k
580k
1.2k
DFCT
56k
20k
FS4
FS3
48k
0.1µ
FLB
FZC
4
– 13 –
CC
40k
FSET
510k
Focus Phase
Compensation
and VC (Pin 1); (V
16
FS2
0.01µ
10k
40k
100k
CC
7
– VC)
50k
4.7µ
SRCH
11µ
2%.
22µ
FS1
and 48k
17
6
5
FEO
ISET
FE–
CXA1372BQ/BS
120k
120k
DGND
resistance;
FOCUS COIL
is

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