AD6122ACPRL AD [Analog Devices], AD6122ACPRL Datasheet

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AD6122ACPRL

Manufacturer Part Number
AD6122ACPRL
Description
CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator
Manufacturer
AD [Analog Devices]
Datasheet
a
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
GENERAL DESCRIPTION
The AD6122 is a low power IF transmitter subsystem, specifi-
cally designed for CDMA applications. It consists of an I and Q
modulator, a divide-by-two quadrature generator, high dynamic
FEATURES
Fully Compliant with IS98A and PCS Specifications
Linear IF Amplifier
Quadrature Modulator
Integral Low Dropout Regulator
Low Power
Companion Receiver IF Chip Available (AD6121)
APPLICATIONS
CDMA, W-CDMA, AMPS and TACS Operation
QPSK Transmitters
–63 dB to +34 dB
Linear-in-dB Gain Control
Temperature-Compensated Gain Control
Modulates IFs from 50 MHz to 350 MHz
Accepts 2.9 V to 4.2 V Input from Battery
10.4 mA at Midgain
<10 A Sleep Mode Operation
COMMON-MODE
VPOS
OSCILLATOR
REFERENCE
OUTPUT
Q INPUT
I INPUT
LOCAL
INPUT
QUADRATURE MODULATOR
POWER-
DOWN 1
REGULATOR
2
DROPOUT
LOW
POWER-
DOWN 2
FUNCTIONAL BLOCK DIAGRAM
QUADRATURE
MODULATOR
VREG
REFERENCE
OUTPUT
OUTPUT
1.23 V
CDMA 3 V Transmitter IF Subsystem
GAIN CONTROL
with Integrated Voltage Regulator
REFERENCE
CONTROL
VOLTAGE
AD6122
FACTOR
SCALE
INPUT
VCC
GAIN
ATTENUATOR
range IF amplifiers with voltage-controlled gain and a power-
down control input. An integral low dropout regulator allows
operation from battery voltages from 2.9 V to 4.2 V.
The gain control input accepts an external gain control voltage
input from a DAC. It provides 97 dB of gain control with a
nominal 75 dB/V scale factor. Either an internal or an external
reference may be used to set the gain-control scale factor.
The I and Q modulator accepts differential quadrature base-
band inputs from a CDMA baseband converter. The local oscil-
lator is injected at twice the IF frequency. A divide-by-two
quadrature generator followed by dual polyphase filters ensures
± 1° quadrature accuracy.
The modulator provides a common-mode reference output to
bias the transmit DACs in the baseband converter to the same
common-mode voltage as the modulator inputs, allowing dc
coupling between the two ICs and thus eliminating the need to
charge and discharge coupling capacitors. This allows the fastest
power-up and power-down times for the AD6122 and CDMA
baseband ICs.
The AD6122 is fabricated using a 25 GHz f
process and is packaged in a 28-lead SSOP and a 32-leadless
LPCC chip scale package (5 mm × 5 mm).
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
GAIN CONTROL
VOLTAGE
INPUT
IF AMPLIFIER
INPUT
IF AMPLIFIERS
COMPENSATION
TEMPERATURE
World Wide Web Site: http://www.analog.com
TRANSMIT
OUTPUT
© Analog Devices, Inc., 2000
t
AD6122
silicon BiCMOS

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AD6122ACPRL Summary of contents

Page 1

FEATURES Fully Compliant with IS98A and PCS Specifications Linear IF Amplifier – +34 dB Linear-in-dB Gain Control Temperature-Compensated Gain Control Quadrature Modulator Modulates IFs from 50 MHz to 350 MHz Integral Low Dropout Regulator Accepts 2.9 V ...

Page 2

AD6122–SPECIFICATIONS noted) NOTE: All powers shown in dBm are referred Specification MODULATOR Output Level Output Third Order Harmonic I/Q Inputs Differential Input Voltage Bandwidth Resistance Quadrature Accuracy Amplitude Balance Output Referred Noise Modulator Common-Mode Reference LO ...

Page 3

... Model AD6122ARS AD6122ARSRL AD6122ACP AD6122ACPRL CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD6122 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 4

AD6122 SSOP LPCC Pin # Pin # Pin Label 1 30 PD1 2 31 PD2 3 32 LDOE 4 1 LDOB 5 2 LDOC LDOGND 7 5 DGND 8 6 LOIPP 9 7 LOIPN 10 8 DVCC ...

Page 5

Test Figures MUST BE EQUAL LENGTHS MODCMREF I DATA 50 MODCMREF MUST BE EQUAL LENGTHS MODCMREF Q DATA 50 MODCMREF Figure 1. Quadrature Modulator’s Characterization Input and Output Impedance Matches REV. B 0.1 F +15V ...

Page 6

AD6122 RF SOURCE Figure 2. IF Amplifier’s Characterization Input and Output Impedance Matches NOTE: RF CABLES FOR I AND Q PATHS MUST BE OF EQUAL LENGTH TEKTRONIX 500mVp-p DIFFERENTIAL AFG2002 R&S SMT03 RF RF SOURCE 1 R&S SMT03 RF RF ...

Page 7

REACTIVE NOISE CONJUGATE SOURCE MATCH HP8116A ROHDE & SCHWARZ FUNCTION GEN. SMT03 4 kHz, 0.5V TO 2.5V 100MHz, –30dBm SQ. WAVE AGC IFIN IFOUT AD6122 TEST BED a. Response Time from Gain Control to IF Output REV. B VREG OUT ...

Page 8

Performance Characteristics AD6122 RBW REF LEV VBW SWT –40dBm –40 1 –50 –60 –70 –80 –90 –100 –110 CL1 –120 –130 –140 CENTER 130.38MHz 519kHz/DIV Figure 6. Spectral Plot at Modulator Outputs: ACPR –35 –40 –45 –50 50 100 ...

Page 9

T = – – + –40 – + –80 0.5 1.0 1.5 VGAIN – V Figure 12. IF Amplifier Response Curve: Gain vs. = –40 ° C, ...

Page 10

AD6122 40 20 VGAIN = 2.0V 0 –20 –40 VGAIN = 1.0V –60 VGAIN = 0.5V –80 50 100 150 200 FREQUENCY – MHz Figure 18. IF Amplifier Gain vs. Frequency for VGAIN = 2.5 V, 2.0 V, 1.5 V, ...

Page 11

QUADRATURE MODULATOR I INPUT LOCAL OSCILLATOR 2 INPUT Q INPUT COMMON-MODE REFERENCE OUTPUT VPOS DROPOUT REGULATOR POWER- DOWN 1 THEORY OF OPERATION The CDMA Transmitter IF Subsystem (Figure 21) consists and Q modulator with a divide-by-two quadrature ...

Page 12

AD6122 The AD6122’s overall gain, expressed in decibels, is linear in dB with respect to the automatic gain control (AGC) voltage, VGAIN. Either REFOUT or an external reference voltage con- nected to REFIN may be used to set the voltage ...

Page 13

AD6122 LDOE FROM EXTERNAL LDOB VOLTAGE REGULATOR LDOC Figure 26. Configuration for Bypassing the Low Dropout Regulator ROOFING FILTER Because the outputs of the AD6122 modulator are open collec- tor, the parasitic capacitances seen at the output of the modula- ...

Page 14

AD6122 R1 IFINP MODOPP MODOPN IFINN Figure 28. Pad Topology   1   log     +   ...

Page 15

INPUT INTERFACES The AD6122 interfaces to CDMA baseband converters provid- ing either IF or baseband outputs. The baseband input is pro- vided by direct connection of the baseband converter’s baseband output to the baseband input of the AD6122 (Figure 30). ...

Page 16

AD6122 AD6122 Evaluation Board The AD6122 Evaluation Board consists of an AD6122, I/O con- nectors, a 20-pin dual header, 2-pin headers and four AD830 high speed video difference amplifiers. It allows the user to evaluate the AD6122’s IF amplifier and ...

Page 17

Table III describes the high frequency signal connectors on the AD6122 customer sample boards. Table III. Evaluation Board SMA Signal Connector Description Connector Description I Modulator Input. 250 mV p-p into 50 Ω termination, dc coupled. The level ...

Page 18

AD6122 J2 0 FMMT4403CT-ND VPOS 2.9V – 4.2V J1 VREG OUT C1 X2 10nF 0 LOIPP VCC X1 X3 C24 0 100nH 10nF 0 1:8 TXOP X6 3pF X10 C4 0 10nF ...

Page 19

V– MODCMREF V–1 4 –15V ICH R6 50 +15V 1 V– MODCMREF V–1 4 –15V TO TXVCC C6 18pF TO DVCC C5 18pF TO IFVCC C7 18pF NOTES USE THE LDO REGULATOR, ...

Page 20

AD6122 0.078 (1.98) 0.068 (1.73) 0.008 (0.203) 0.002 (0.050) 0.010 (0.25) REF OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Lead SSOP (RS-28) 0.407 (10.34) 0.397 (10.08 0.07 (1.79) PIN 1 0.066 (1.67) 8° 0.0256 0.015 ...

Page 21

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