AD641 AD [Analog Devices], AD641 Datasheet - Page 12

• Manufacturer Part Number: AD641
• Description: 250 MHz Demodulating Logarithmic Amplifier
• Manufacturer: AD [Analog Devices]

AD641
Using Higher Supply Voltages
The AD641 is calibrated using 5 V supplies. Scaling is very
insensitive to the supply voltages and higher supply voltages will
not directly cause significant errors. However, the AD641 power
dissipation must be kept below 500 mW in the interest of reli-
ability and long term stability. When using well regulated supply
voltages above 6 V, the decoupling resistors shown in the
application schematics can be increased to maintain 5 V at the
IC. The resistor values are calculated using the specified maxi-
mum of 15 mA current into the +V
maximum of 60 mA into the –V
when using 9 V supplies, a resistor of (9 V – 5 V)/15 mA, about
261 , should be included in the +V
(9 V – 5 V)/60 mA, about 64.9
asymmetric supplies may be dealt with in a similar way.
Using the Attenuator
In applications where the signal amplitude is sufficient, the on-
chip attenuator should be used because it provides a tempera-
ture independent dynamic range (compare Figures 18 and 19).
Figure 26 shows this attenuator in more detail. R1 is a thin-film
SIGNAL
INPUT
R1
DENOTES A CONNECTION TO THE
GROUND PLANE; OBSERVE COMMON
CONNECTIONS WHERE SHOWN.
ALL UNMARKED CAPACITORS ARE
0.1 F CERAMIC. FOR VALUES OF
NUMBERED COMPONENTS SEE TEXT
R2
Figure 26. Details of the Input Attenuator
SIG
SIG
–IN
+IN
20
1
ATN
ATN
OUT
LO
SIG
19
–IN
SIG
+IN
2
20
1
COM
COM
ATN
CKT
18
3
OUT
ATN
ATN
LO
19
2
COM
ATN
R2
RG1
R1
R3
R4
17
4
COM
ATN
1k
18
3
U1 AD641
RG0
ATN
16
IN
5
S
COM
1k
ATN
17
terminal (Pin 7). For example,
in each –V
4
RG2
BL1
15
S
6
S
10
terminal (Pin 12) and a
INPUT
ATN
lead to each AD641 and
Figure 27. Basic Connections for Cascaded AD641s
16
IN
5
–V
LOG
OUT
14
7
AMPLIFIER
S
C1
FIRST
LOG
COM
ITC
S
NC
13
8
lead. Of course,
BL2
+V
12
9
S
10
4.7
–OUT
+OUT
SIG
SIG
11
10
SIG
SIG
–IN
+IN
20
1
–12–
ATN
ATN
OUT
LO
19
2
resistor of nominally 270
(TC). It is trimmed to calibrate the intercept to 10 mV dc (or
–24 dBm for sinusoidal inputs), that is, to an attenuation of
nominally 20 dBs at +27 C. R2 has a nominal value of 30
has a high positive TC, such that the overall attenuation factor
is 0.33%/ C at +27 C. This results in a transmission factor that is
proportional to absolute temperature, or PTAT. (See Intercept
Stabilization for further explanation.) To improve the accuracy
of the attenuator, the ATN COM nodes are bonded to both Pin
3 and Pin 4. These should be connected directly to the “SlGNAL
LOW” of the source (for example, to the grounded side of the
signal connector, as shown in Figure 32) not to an arbitrary
point on the ground plane.
R4 is identical to R2, and in shunt with R3 (270
forms a 27
of the attenuator. By connecting Pin 1 to ATN LOW (Pin 2)
this resistance minimizes the offset caused by bias currents. The
offset nulling scheme shown in Figure 25 may still be used, with
the external resistor R
ity is improved because the compensating voltage introduced at
Pin 20 is now PTAT. Drifts of under 1 V/ C (referred to Pins
1 and 20) can be maintained using the attenuator.
It may occasionally be desirable to attenuate the signal even
further. For example, the source may have a full-scale value of
This may be achieved either by using an independent external
attenuator or more simply by adding a resistor in series with
ATN IN (Pin 5). In the latter case the resistor must be trimmed
to calibrate the intercept, since the input resistance at Pin 5 is
not guaranteed. A fixed resistor of 1 k in series with a 500
variable resistor calibrate to an intercept of 50 mV (or –26 dBV)
for dc or square wave inputs and provide a 10 V input range.
The intercept stability will be degraded to about 0.003 dB/ C.
COM
COM
ATN
10 V, and since the basic range of the AD641 extends only to
200 mV dc, an attenuation factor of 50 might be chosen.
CKT
18
3
COM
ATN
RG1
17
4
1k
U2 AD641
RG0
ATN
16
IN
5
resistor with the same TC as the output resistance
1k
RG2
BL1
15
6
10
–V
LOG
OUT
14
7
B
S
C2
omitted and R
LOG
COM
ITC
13
8
10
and low temperature coefficient
BL2
+V
12
9
S
4.7
–OUT
+OUT
SIG
SIG
1mA/DECADE
NC
NC
11
10
OS
= 500 k . Offset stabil-
C3
R
L
+5V
= 50
OUTPUT
–50mV/DECADE
–5V
thin film)
REV. C
and