cxa2054s Sony Electronics, cxa2054s Datasheet

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cxa2054s

Manufacturer Part Number
cxa2054s
Description
Us Audio Multiplexing Decoder
Manufacturer
Sony Electronics
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
CXA2054S
Manufacturer:
SONY
Quantity:
10 000
Description
the Zenith TV Multi-channel System and also
corresponds with I
demodulation, SAP (Separate Audio Program)
demodulation, dbx noise reduction and sound
processor. Various kinds of filters are built in while
adjustment, mode control and sound processor
control are all executed through I
Features
• Audio multiplexing decoder, dbx noise reduction
• All adjustments are possible through I
• Various built-in filter circuits greatly reduce external
• There are two channel external inputs for LSOUT
• Automatic volume control between input sources is
Standard I/O Level
• Input level
Pin Configuration (Top View)
The CXA2054S is an IC designed as a decoder for
decoder and sound processor (surround, volume
limiter, bass · treble, volume) are all included in a
single chip. Almost any sort of signal processing is
possible through this IC.
allow for automatic adjustment.
parts.
outputs.
possible through volume limiter.
COMPIN (Pin 19)
AUX1-L/R (Pins 40 and 39)
AUX2-L/R (Pins 42 and 41)
SURRIN (Pin 4)
US Audio Multiplexing Decoder
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
2
C BUS. Functions include stereo
48
1
47
2
46
3
45
4
44
5
2
C BUS.
245 mVrms
490 mVrms
490 mVrms
490 mVrms
43
6
42
7
41
2
8
C BUS to
40
9
39
10
38
11
—1—
37
12
36
13
Absolute Maximum Ratings (Ta=25 °C)
• Supply voltage
• Operating temperature Topr
• Storage temperature
• Allowable power dissipation
Range of Operating Supply Voltage
Applications
multiplexing TV broadcasting
Structure
• Output level
required for the use this device.
A license of the dbx-TV noise reduction system is
TV, VCR and other decoding systems for US audio
Bipolar silicon monolithic IC
TVOUT-L/R (Pins 44 and 43)
LSOUT-L/R (Pins 7 and 6)
SURROUT (Pin 5)
35
14
34
15
33
16
32
17
CXA2054S
31
18
48 pin SDIP (Plastic)
30
19
29
20
28
21
27
22
Tstg
V
P
26
23
CC
D
25
24
–65 to +150
–20 to +75
490 mVrms
490 mVrms
490 mVrms
9±0.5
2.2
11
E96Y15B86-TE
°C
°C
W
V
V

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cxa2054s Summary of contents

Page 1

... US Audio Multiplexing Decoder Description The CXA2054S designed as a decoder for the Zenith TV Multi-channel System and also corresponds with BUS. Functions include stereo demodulation, SAP (Separate Audio Program) demodulation, dbx noise reduction and sound processor. Various kinds of filters are built in while ...

Page 2

... Block Diagram —2— CXA2054S ...

Page 3

... CC 4.88k 10k 4 27.5k 47k 4V 20k 20k —3— CXA2054S (Ta=25 ° Description BASS filter pin. (Left channel (Connect capacitor between Pins 1 and 48.) The cutoff frequency is determined by the built-in resistor and the external capacitance. BASS filter pin. ...

Page 4

... CC 7.5k 35µ 7.5k 35µ 2. —4— CXA2054S Description (L-R) signal output pin. LSOUT right channel output pin. LSOUT left channel output pin. — Serial data I/O pin. V > 3 < 1 Serial clock input pin. V > 3 < 1 Digital block GND ...

Page 5

... V CC 147 17 10k 10k —5— CXA2054S Description Slave address control switch. The slave address is selected by changing the voltage applied to this pin. Input the (L+R) signal from MAINOUT (Pin 14). (L+R) signal output pin. — Stereo block PLL loop filter integrating pin. ...

Page 6

... V CC 30p 1.8k 21 147 16k —6— CXA2054S Description Pilot cancel circuit loop filter integrating pin. (Connect a 1 µF capacitor between this pin and GND Audio multiplexing signal input 19 pin. Band gap reference output pin. (Connect a 10 µF capacitor between this pin and GND ...

Page 7

... CXA2054S Description Analog block GND. Set the time constant for the SAP carrier detection circuit. (Connect a 4.7 µF capacitor between this pin and GND.) Supply voltage pin. (L-R) signal output pin Input the (L-R) signal from SUBOUT (Pin 25) ...

Page 8

... V CC 2.9V 580 4V 147 36k 580 8k 30k 8µ —8— CXA2054S Description CC Set the time constant for the noise detection circuit. (Connect a 4.7 µF capacitor 4V between this pin and GND SAP FM detector output pin. 28 Variable de-emphasis integrating pin. (Connect a 2700 pF capacitor and a 3 ...

Page 9

... 20k 50µ 7.5µ —9— CXA2054S Description Determine the restoration time constant of the variable de- emphasis control effective value detection circuit. (The specified restoration time constant can be obtained by connecting a 3.3 µF capacitor between this pin and GND.) Variable de-emphasis output pin. (Connect a 4.7 µ ...

Page 10

... V CC 10k 39 27. 47k 4V 42 20k 20k —10— CXA2054S Description CC Weight the VCA control effective value detection circuit. (Connect a 1 µF capacitor and a 3.9 k resistor in series between this pin and GND.) Volume limiter detection circuit bias pin. (Connect resistor between pins 37 and 38 ...

Page 11

... V CC 580 45 —11— CXA2054S Description TVOUT right channel output pin. TVOUT left channel output pin. Set the central frequency of the SURROUND circuit phase shifter. The frequency is determined by the built-in resistor and the external capacitance. ...

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... CXA2054S ...

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... CXA2054S ...

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... CXA2054S ...

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... CXA2054S ...

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... HD t LOW t HIGH t : STA DAT DAT STO HIGH t ;DAT t ;DAT HD SU —16— CXA2054S Min. Typ. Max. Unit 3.0 — 5 — 1.5 — — 10 µA — — — 0 — — mA — — — ...

Page 17

... Electrical Characteristics Measurement Circuit —17— CXA2054S ...

Page 18

... AUX1 forced MONO OFF 0 AUX2 forced MONO OFF 0 VL OFF 0 Surround OFF 0 Internal mode selection 0 TV decoder output selection 0 1 Mute OFF 1 — Fixed by the set specifications — —18— CXA2054S Setting value when electrical characteristics are measured Adjustment point ...

Page 19

... None output frequency 62.936 kHz as possible 9.4 kHz STA5 Adjust to the center of the 600 mVrms (FILADJ) FILADJ=1 condition ST TVOUT-R Minimize the output level 300 Hz output level ST TVOUT-R Minimize the output level 3 kHz output level —19— CXA2054S Test mode setting TEST-DA=1 TEST1=1 ...

Page 20

... Adjustment range : ±30 % Adjustment bits : 6 bits free running) frequency input state, and adjust “VCO” H (62.936 kHz) as possible. H Adjustment point “SPECTRAL” Adjustment range: ±15 % Adjustment bits: 6 bits —20— CXA2054S Control data “FILTER” 3F Measurement data STA5 “FILTER” ...

Page 21

... SAP DECODER DET MODE CONTROL FIXED VARIABLE (VE OUT) (VCAIN) DEEMPHASIS DEEMPHASIS 4.7µ HPF RMS LPF DET LPF RMS DET Fig 3. dbx-TV block —21— CXA2054S 15 SAP dbx-TV NR TELEMETRY FM 10kHz FM 3kHz 50-10kHz 6. =15.734kHz H 13 MATRIX (Lch ...

Page 22

... VCA (voltage control amplifier). Finally, the VCA output is converted from a current to a voltage using an operational amplifier and then input to the matrix. BASS PREVOL SURROUND Fig. 4. Sound processor block as a carrier as shown in the Fig. 1. First, the SAP signal only is extracted —22— CXA2054S (LSOUT-L) 7 VOL-L (LSOUT-R) TREBLE 6 VOL-R ...

Page 23

... Inputs are output as is. Lout=Lin { Rout=Rin When surround is ON (SURR=1) 1–j RC Lout=Lin – (Lin-Rin) { 1+j RC 1–j RC Rout=Rin + (Lin-Rin) 1+j RC R=24 k (IC on-chip) { C=0.022 µF (Externally attached to Pin 45) (Lin, Lout) and (Rin, Rout) indicate the left- and right- channel I/O of the surround circuit. —23— CXA2054S ...

Page 24

... VOLUME MAX, PREVOL MAX, BASS & TREBLE CENTER, SURROUND OFF, VL OFF 3 Only SURROUT output 4 Input level TVOUT output level 245 mVrms 1 490 mVrms 490 mVrms 490 mVrms 490 mVrms — 490 mVrms — —24— CXA2054S LSOUT output level 3 2 490 mVrms 2 490 mVrms 490 mVrms 490 mVrms 4 ...

Page 25

... STA4 STA5 STA6 BIT4 BIT3 BIT2 NOISE — — STA4 STA5 STA6 BIT4 BIT3 BIT2 NOISE FILADJ — —25— CXA2054S BIT2 BIT1 BIT0 ATT (4) FOMO SAPC M1 FST FEXT1 FEXT2 PR-VOL (4) TREBLE (4) BASS (4) : Don’t care STA7 STA8 BIT1 BIT0 — ...

Page 26

... Selection of internal mode or external input mode for LSOUT U output Selection of TVOUT mute ON/OFF mute ON mute OFF) Selection of LSOUT mute ON/OFF mute ON mute OFF) S Turn the input stage MVCA off when ATTSW=1. Selection of SAP mode or L+R mode according to the S presence of SAP broadcasting —26— CXA2054S Contents ...

Page 27

... FILTER (STA5) adjustment mode In addition, the following outputs are present at Pins 44 and 43. TVOUT-L (Pin 44) : TVOUT-R (Pin 43) : Contents 245 mVrms –5 +3 ± ± control DC level STEREO VCO oscillation frequency (4f SAP BPF OUT NR BPF OUT —27— CXA2054S 1 : RESET 1 : Stereo 1 : SAP 1 : Noise range ) H ...

Page 28

... Treble Center (0 dB Treble Max. BASS (4) : LSOUT output bass control 0 = Bass Min. 7 & Bass Center (0 dB Bass Max. NRSW (1) : Select stereo mode or SAP mode 0 = Stereo mode 1 = SAP mode FOMO (1) : Select forced MONO mode 0 = Normal mode 1 = Forced MONO mode —28— CXA2054S ...

Page 29

... Mute OFF ATTSW (1) : Select BYPASS SW of Main VCA 0 = Normal mode 1 = Main VCA is passed SAPC (1) : Select the SAP signal output mode When there is no SAP signal, the conditions for selecting SAP output are selected by SAPC L+R output is selected 1 = SAP output is selected —29— CXA2054S ...

Page 30

... Regardless of the presence of SAP discrimination, dbx input : “SAP” left channel : SAP, right channel : SAP However, when there is no SAP, SAPOUT output is soft muted (–7 dB) “Forced MONO” “MUTE” “TV mode/external input mode selection” “TEST1” “TEST-DA” —30— CXA2054S SAPC=1 ...

Page 31

... CXA2054S dbx Output SAPC input Lch Rch 1 MUTE L+R L+R 1 SAP SAP SAP 1 SAP L+R SAP 1 MUTE L+R L+R 1 (SAP) (SAP) (SAP) 1 (SAP) L+R (SAP MUTE ...

Page 32

... CXA2054S dbx Output SAPC input Lch Rch 0 MUTE L+R L+R 0 MUTE L+R L+R 0 MUTE L+R L+R 0 (SAP) (SAP) (SAP) 0 (SAP) L+R (SAP MUTE L+R L MUTE ...

Page 33

... EXT1, FEXT1 the EXT1,FEXT1, conditions conditions MUTE MUTE Selected according to Selected according to the EXT1, FEXT1 the EXT1,FEXT1, conditions conditions )) H L —33— CXA2054S LS OUT-L LS OUT-R TV-L TV-R AUX1-L AUX1-R AUX1-L AUX1-L AUX2-L AUX2-R AUX2-L AUX2-L Selected according to Selected according to the EXT2, FEXT2, ...

Page 34

... P DATA ACK 2 C controller) H during Read ACK MSB DATA —34— CXA2054S MSB LSB HIZ HIZ ACK Sub Address ACK Data can be transferred in 8-bit units to be set as required. Sub address is incremented automatically. HIZ ...

Page 35

... Measurement point : TVOUT-L/R 1.0 Standard level (100%) –10 0 Input level (dB) Input level vs. Distortion characteristics 2 (Stereo) Input signal : Stereo L=–R (dbx-TVNR ON), 1kHz 0dB=100% modulation level 10 V =9V, 30kHz using LPF, ST mode CC Measurement point : TVOUT-L/R 1.0 10 –10 10 —35— CXA2054S Standard level (100 Input level (dB) ...

Page 36

... Frequency (kHz) SAP frequency characteristics and group delay Gain 10 0 –10 Group delay –20 3.8 6. 100 Frequency (kHz) —36— CXA2054S 100 120 ...

Page 37

... Volume characteristics 0 –20 –40 –60 Input : AUXIN (Pins 40/39 and 42/41) –80 1kHz, 490mVrms Output : LSOUT (Pins 5, 6 and 7) –100 Control data VOL-L, VCL-R, VOL-SURR Volume limiter characteristics 500 100 10 –2 – (Vrms) —37— TREBLE.MAX TREBLE.MIN 10k 20k CXA2054S ...

Page 38

... SONY CODE EIAJ CODE JEDEC CODE 48PIN SDIP (PLASTIC) + 0.4 – 0 1.778 0.5 ± 0.1 0.9 ± 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT SDIP-48P-02 SDIP048-P-0600 LEAD MATERIAL PACKAGE MASS —38— CXA2054S 0° to 15° EPOXY RESIN SOLDER/PALLADIUM PLATING 42/COPPER ALLOY 5.1g ...

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