cxa2647n Sony Electronics, cxa2647n Datasheet - Page 13

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cxa2647n

Manufacturer Part Number
cxa2647n
Description
Rf Signal Processor For Cd Players
Manufacturer
Sony Electronics
Datasheet
• Center Error
The signals input to the A and D pins and the B and C pins are arithmetically amplified and the center error
signal is output.
ROM/RW switching and offset addition functions are incorporated.
• Output DC Level Shift
The FE, TE and CE output DC voltages are level shifted to the digital VC voltage (DVC).
The reference voltage of this IC is the VC voltage, and only the output reference voltage changes.
The maximum output voltage of each output signal should be kept to the digital V
order to protect the DSP IC.
• SW
This controls the laser (APC) on/off, active/sleep mode, and ROM/RW mode switching.
Switching is controlled by the voltage applied to the SW pin.
Status of Functions on SW Switching
Control
voltage
VC or Hi-Z
GND
V
CC
DVC
VC
SW
Item
CE = Gain {(B + C) – (A + D)} signal is arithmetically amplified.
Low frequency gain ROM: 15.5dB
12
30k
15k
VOFST
APC
OFF
ON
ON
30k
SW
ROM
RW: 27.5dB
A
D 9
B
C
RW
6
7
8
Active/Sleep
VOFST
Active
Active
Sleep
ROM
12k
30k
30k
30k
30k
24k
96k
Active/Sleep
ROM/RW
APC ON/OFF
VC
RW
48k
24k
96k
– 13 –
ROM/RW
The VC and DVC voltages are arithmetically amplified
and output as the VOFST voltage.
The VOFST voltage serves as the level shift reference
voltage, and is distributed to each block.
VOFST = 2VC –DVC
ROM
RW
ROM
RW
SW low/high condition
Low: GND to DVC – 1.2V
High: DVC + 1.2V to Vcc
50k
Cut-off frequency fc (typ.)
The VC buffer is always in active mode
even if it enters sleep mode.
In the function block, MODE SW is always
set to active mode.
CEI 21
DVC
ROM: 200kHz
RW: 200kHz
124
200k
CC
20
124
voltage (DV
CE
CC
) or less in
CXA2647N

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