cxl1512m Sony Electronics, cxl1512m Datasheet
cxl1512m
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cxl1512m Summary of contents
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... CCD Delay Line for NTSC For the availability of this product, please contact the sales office. Description The CXL1512M developed for use in conjunction with Y/C signal processing ICs for NTSC. This CCD delay line provides the comb filter output for eliminating the chrominance signal cross talk and 1H delay output for luminance signals ...
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... Block Diagram and Pin Configuration (Top View Autobias circuit (C) Bias circuit Bias circuit 0.3Vp-p to 1.0Vp-p (0.5Vp-p Typ.) 3.579545MHz fsc buffer D Output circuit (S/H) Clamp circuit – 2 – CXL1512M PLL Timing Driver Driver 1 2 Autobias circuit (Y) Output 1H circuit (S/ ...
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... AB-C Autobias output ( (IC) (Connected internally C-OUT O Chrominance signal output V 24 — GND SS Pins 6 and 22 are internally connected. Therefore, connect a voltage of 5V when using these pins. Description — — — — — — — – 3 – CXL1512M ...
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... Description of Functions The CXL1512M provides chrominance signal comb filters and luminance signal delay outputs. Chrominance comb filter output Luminance signal delay output • fsc Output Pin The buffer output of the clock input from the CLK pin is provided at the fsc output pin. Since a pull-up resistor is contained inside the IC, the supply voltage is produced during open, and the output is stopped ...
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... CXL1512M Typ. Max. Unit Note Typ. Max. Unit Note –2 –1 0 –40 – ...
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... Calculate with the gain applying when 200mVp-p and 500mVp-p sine waves (see Note 2 for the frequencies) are input to C-IN1 and C-IN2. (Example of calculation) Output voltage with 500mVp-p input (mVp-p) LIC = 20 log Output voltage with 200mVp-p input (mVp-p) [dB] [dB] see Note 2 500mVp-p [dB] 200mVp-p – 6 – CXL1512M ...
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... Measure the internal clock component (4fsc: 14.31818MHz component) when no signals are input. 8. Measure the delay time of the C-OUT output when the C-IN1 signal is input. fN 3.563811MHz fN fp Frequency – 7 – CXL1512M 178mV 321mV 143mV ...
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... Input the 5-step staircase wave only for the luminance signal shown in the figure below, and measure the Y-OUT luminance level (Y) and SYNC level (S). 357mV Y S 143mV 357mV 143mV (Example of calculation) S (mV) LNY = Y (mV) 500mV 143mV – 8 – CXL1512M 500mV 100 ...
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... CXL1512M ...
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... CXL1512M ...
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... Differential gain vs. Supply voltage 4.75 5 Supply voltage [V] Frequency response vs. Supply voltage 0 –1 –2 –3 4.75 5.25 Chrominance linearity vs. Supply voltage 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 5.25 4.75 Differential phase vs. Supply voltage 5.25 4.75 – 11 – CXL1512M 5 5.25 Supply voltage [V] 5 5.25 Supply voltage [V] 5 5.25 Supply voltage [V] ...
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... Chrominance linearity vs. Ambient temperature –1 – –10 0 Differential phase vs. Ambient temperature –10 0 Ambient temperature [°C] – 12 – CXL1512M Ambient temperature [° Ambient temperature [° ...
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... Unit: mm 15.0 – 0 0.45 ± 0.1 SONY CODE EIAJ CODE JEDEC CODE 24PIN SOP (PLASTIC 1.27 ± 0.12 M PACKAGE STRUCTURE MOLDING COMPOUND LEAD TREATMENT SOP-24P-L01 SOP024-P-0300-A LEAD MATERIAL PACKAGE WEIGHT – 13 – CXL1512M + 0.4 1.85 – 0.15 0.15 + 0.2 0.1 – 0.05 + 0.1 0.2 – 0.05 EPOXY/PHENOL RESIN SOLDER PLATING COPPER ALLOY / 42ALLOY 0.3g ...