hm5118165tt-7 Elpida Memory, Inc., hm5118165tt-7 Datasheet

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hm5118165tt-7

Manufacturer Part Number
hm5118165tt-7
Description
16 M Edo Dram 1-mword ? 16-bit
Manufacturer
Elpida Memory, Inc.
Datasheet
Description
The HM5118165 is a CMOS dynamic RAM organized as 1,048,576-word
advanced 0.5 µm CMOS technology for high performance and low power. The HM5118165 offers Extended
Data Out (EDO) Page Mode as a high speed access mode. It is packaged in 42-pin plastic SOJ and 50-pin
plastic TSOP II.
Features
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
Single 5 V (±10%)
Access time : 50 ns/60 ns/70 ns (max)
Power dissipation
EDO page mode capability
Refresh cycles
4 variations of refresh
2CAS-byte control
Battery backup operation (L-version)
Active mode
Standby mode : 11 mW (max)
1024 refresh cycles : 16 ms
RAS-only refresh
CAS-before-RAS refresh
Hidden refresh
Self refresh (L-version)
: 1045 mW/935 mW/825 mW (max)
: 0.83 mW (max) (L-version)
16 M EDO DRAM (1-Mword
: 128 ms (L-version)
HM5118165 Series
1 k Refresh
(Previous ADE-203-636D (Z))
16-bit)
16-bit. It employs the most
E0154H10 (Ver. 1.0)
Jul. 6, 2001 (K)

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hm5118165tt-7 Summary of contents

Page 1

... RAS-only refresh CAS-before-RAS refresh Hidden refresh Self refresh (L-version) 2CAS-byte control Battery backup operation (L-version) Elpida Memory, Inc joint venture DRAM company of NEC Corporation and Hitachi, Ltd. 16-bit Refresh (Previous ADE-203-636D (Z)) 16-bit. It employs the most E0154H10 (Ver. 1.0) Jul. 6, 2001 (K) ...

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... HM5118165 Series Ordering Information Type No. HM5118165J-5 HM5118165J-6 HM5118165J-7 HM5118165LJ-5 HM5118165LJ-6 HM5118165LJ-7 HM5118165TT-5 HM5118165TT-6 HM5118165TT-7 HM5118165LTT-5 HM5118165LTT-6 HM5118165LTT-7 2 Access time Package 50 ns 400-mil 42-pin plastic SOJ (CP-42D 400-mil 50-pin plastic TSOP II (TTP-50/44DC ...

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... Row/Refresh address — Column address I/O0 to I/O15 Data input/Data output RAS Row address strobe UCAS, LCAS Column address strobe WE Read/Write enable OE Output enable V Power supply CC V Ground connection Data Sheet E0154H10 HM5118165TT/LTT Series I/ I/O15 I/O1 3 I/O14 40 I/ I/O13 I/O3 5 ...

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HM5118165 Series Block Diagram A0 A1 Column • address to • buffers • A9 • • Row • address buffers 4 RAS UCAS LCAS WE OE Timing and control Column decoder 1M array 1M array 1M array 1M array 1M ...

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Truth Table RAS LCAS UCAS ...

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HM5118165 Series Absolute Maximum Ratings Parameter Voltage on any pin relative Supply voltage relative Short circuit output current Power dissipation Operating temperature Storage temperature Recommended DC Operating Conditions ( +70°C) Parameter ...

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DC Characteristics ( +70°C, V Parameter Symbol RAS-only refresh current CC3 1 Standby current* I CC5 CAS-before-RAS refresh I CC6 current 1, 3 EDO page mode current CC7 4 Battery backup current* I ...

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HM5118165 Series AC Characteristics ( +70°C, V Test Conditions Input rise and fall time Input levels 3.0 V Input timing reference levels: 0.8 V, 2.4 V Output timing reference levels: 0.8 V, 2.0 ...

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Read Cycle Parameter Access time from RAS Access time from CAS Access time from address Access time from OE Read command setup time Read command hold time to CAS Read command hold time from RAS Read command hold time to ...

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HM5118165 Series Write Cycle Parameter Write command setup time Write command hold time Write command pulse width Write command to RAS lead time Write command to CAS lead time Data-in setup time Data-in hold time Read-Modify-Write Cycle Parameter Read-modify-write cycle ...

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EDO Page Mode Cycle Parameter EDO page mode cycle time EDO page mode RAS pulse width Access time from CAS precharge RAS hold time from CAS precharge t Output data hold time from CAS low t CAS hold time referred ...

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HM5118165 Series Self Refresh Mode (L-version) Parameter RAS pulse width (self refresh) RAS precharge time (self refresh) CAS hold time (self refresh) Notes measurements assume initial pause of 200 µs is required after power up ...

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All the V and V pins shall be supplied with the same voltages 21 and t ASC CAH RCS WCS WCH CSR RPC are determined by ...

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HM5118165 Series Notes concerning 2CAS control Please do not separate the UCAS/LCAS operation timing intentionally. UCAS/LCAS are allowed under the following conditions. 1. Each of the UCAS/LCAS should satisfy the timing specifications individually. 2. Different operation mode for upper/lower byte ...

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Timing Waveforms* Read Cycle RAS t T UCAS LCAS t t ASR t RAH Address Row t RCS WE Din OE Dout Data Sheet E0154H10 RAS t t CSH CRP t t RCD RSH t CAS ...

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HM5118165 Series Early Write Cycle RAS t T UCAS LCAS t t ASR RAH Row Address WE Din Dout Data Sheet E0154H10 RAS t t CSH CRP t t RCD RSH t CAS t t ASC ...

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Delayed Write Cycle* RAS t T UCAS LCAS t t ASR RAH Row Address WE Din OE Dout RAS t CSH t t RCD RSH t CAS t t ASC CAH Column t CWL t RWL ...

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HM5118165 Series 18 Read-Modify-Write Cycle* RAS t T UCAS LCAS t t ASR RAH Address Row WE Din OE Dout Data Sheet E0154H10 18 t RWC t RAS t t RCD CAS t RAD t t ASC CAH Column t ...

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RAS-Only Refresh Cycle RAS t CRP UCAS LCAS t ASR Address t OFR t OFF Dout Data Sheet E0154H10 RAS RPC t RAH Row High-Z HM5118165 Series CRP 19 ...

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HM5118165 Series CAS-Before-RAS Refresh Cycle t RP RAS RPC CSR UCAS LCAS Address t OFR t OFF Dout Data Sheet E0154H10 RAS RP RAS t RPC t t ...

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Hidden Refresh Cycle t RAS RAS RCD UCAS LCAS t RAD RAH ASR ASC Address Row t RCS WE t DZC Din t DZO RAC Dout ...

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HM5118165 Series EDO Page Mode Read Cycle t RNCD RAS CSH t UCAS CAS LCAS t RCHR t RCS CAH t RAH ASC ASR Address Row Column 1 t CAL t DZC High-Z ...

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EDO Page Mode Read Cycle (2CAS) t RNCD RAS CSH t LCAS CAS UCAS t RCS CAH RAH ASC t ASR Address Row Column 1 t CAL t DZC High-Z Din t DZO ...

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HM5118165 Series EDO Page Mode Early Write Cycle RAS RCD UCAS LCAS ASR RAH ASC Address Row Column 1 t WCS Din Dout 24 t RASP t CSH HPC t ...

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EDO Page Mode Delayed Write Cycle* RAS CSH t RCD UCAS LCAS t RAD t t ASR ASC t t RAH CAH Address Row Column 1 t RCS WE t DZC Din t DZO t OED OE ...

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HM5118165 Series EDO Page Mode Read-Modify-Write Cycle* RAS RCD UCAS LCAS t RAD t t ASR ASC t t RAH CAH Row Column 1 Address t RWD t AWD t CWD WE t RCS t DZC Din ...

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EDO Page Mode Mix Cycle (1) RAS UCAS CAS LCAS t CSH t RCD t t WCS WCH WE t ASC t t CAH t RAH ASR Address Row Column Din Din ...

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HM5118165 Series EDO Page Mode Mix Cycle (2) t RNCD RAS CSH t UCAS CAS LCAS t RCD t RCHR t t RCS ASC CAH t t RAH ASR Address Row Column 1 t ...

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Self Refresh Cycle (L-version RAS RPC CSR UCAS LCAS t OFR t OFF Dout Data Sheet E0154H10 HM5118165 Series t t RASS RPS t t CHS High-Z CRP ...

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HM5118165 Series Package Dimensions HM5118165J/LJ Series (CP-42D) 27.06 27.43 Max 42 1 0.74 1.30 Max 0.43 0.10 0.41 0.08 0.10 Dimension including the plating thickness Base material dimension Data Sheet E0154H10 1.27 Hitachi Code JEDEC EIAJ Weight ...

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... HM5118165TT/LTT Series (TTP-50/44DC) 20.95 21.35 Max 0.80 0.27 0.07 0.13 M 0.25 0.05 1.15 Max 3.20 0.10 Dimension including the plating thickness Base material dimension Data Sheet E0154H10 26 25 11.76 0.20 0 – 5 Hitachi Code JEDEC EIAJ Weight (reference value) HM5118165 Series Unit: mm 0.80 0.50 0.10 TTP-50/44DC Conforms — 0. ...

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... HM5118165 Series Cautions 1. Elpida Memory, Inc. neither warrants nor grants licenses of any rights of Elpida Memory, Inc.’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Elpida Memory, Inc. bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document ...

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