em78p811 ELAN Microelectronics Corp, em78p811 Datasheet - Page 22

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em78p811

Manufacturer Part Number
em78p811
Description
8-bit Micro-controller
Manufacturer
ELAN Microelectronics Corp
Datasheet

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VII.6 Interrupt
interrupt (internal) , two 8-bit counters overflow interrupt .
register if you enable IOCF register.
Global interrupt is enabled by ENI instruction and is disabled by DISI instruction. When one of the interrupts (when
enabled) generated, will cause the next instruction to be fetched from address 008H. Once in the interrupt service routine
the source of the interrupt can be determined by polling the flag bits in the RF register. The interrupt flag bit must be
cleared in software before leaving the interrupt service routine and enabling interrupts to avoid recursive interrupts.
available.
signal will cause interrupt , or these signals will be treated as general input data .
hardware inturrept is 008H.
_________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
named as SLEEP MODE or IDLE mode) by (1)TCC time out (IDLE mode only) (2) WDT time-out (if enabled)
or, (3) external input at PORT9 (4)RINGTIME pin. The four cases will cause the controller wake up and run
from next instruction in IDLE mode , reset in SLEEP mode . After wake-up , user should control WATCH
DOG in case of reset in GREEN mode or NORMAL mode. The last three should be open RE register before
into SLEEP mode or IDLE mode . The first one case will set a flag in RF bit0 . And it will go to address 0x08
when TCC generate a interrupt .
• The oscillator is running, or will be started.
• The Program Counter (R2) is set to all "0".
• When power on, the upper 3 bits of R3 and the upper 2 bits of R4 are cleared.
• The Watchdog timer and prescaler are cleared.
• The Watchdog timer is disabled.
• The CONT register is set to all "1"
• The other register (bit7..bit0)
Once the RESET occurs, the following functions are performed.
The CALLER ID IC has internal interrupts which are falling edge triggered, as followed : TCC timer overflow
If these interrupt sources change signal from high to low , then RF register will generate '1' flag to corresponding
RF is the interrupt status register which records the interrupt request in flag bit. IOCF is the interrupt mask register.
There are four external interrupt pins including INT0 , INT1 , INT2 , INT3 . And four internal counter interrupt
External interrupt INT0 , INT1 , INT2 , INT3 signals are from PORT7 bit0 to bit3 . If IOCF is enable then these
After reset, the next instruction will be fetched from address 000H and the instruction inturrept is 001H and the
R5 = “00000000”
R6 = PORT
R7 = PORT
R8 = PORT
R9 = PORT
RA = "000x0xxx
RB = "11111111"
RC = "00000000"
RD = "xxxxxxxx"
RE = "00000000"
RF = "00000000"
The controller can be awakened from SLEEP mode or IDLE mode (execution of "SLEP" instruction,
IOC6 = "11111111"
IOC7 = "11111111"
IOC8 = "11111111"
IOC9 = "11111111"
IOCA = "00000000"
Page0 IOCB = "00000000" Page1 IOCB = "00000000"
Page0 IOCC = "0xxxxxxx" Page1 IOCC = "00000000"
Page0 IOCD = "00000000"
Page0 IOCE = "00000000"
IOCF = "00000000"
21
Page1 IOCE = "00000000"
8-bit OTP Micro-controller
EM78P811

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