em78p811 ELAN Microelectronics Corp, em78p811 Datasheet - Page 23

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em78p811

Manufacturer Part Number
em78p811
Description
8-bit Micro-controller
Manufacturer
ELAN Microelectronics Corp
Datasheet

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instruction from “SLEP” instruction and then go to address 0x08 in IDLE mode . These two cases will set a RF
flag.
VII.7 Instruction Set
Instruction set has the following features:
(1). Every bit of any register can be set, cleared, or tested directly.
(2). The I/O register can be regarded as general register. That is, the same instruction can operates on I/O register.
operational registers and general purpose registers) is to be utilized by the instruction. Bits 6 and 7 in R4 determine the
selected register bank. "b'' represents a bit field designator which selects the number of the bit, located in the register "R'',
affected by the operation. "k'' represents an 8 or 10-bit constant or literal value.
_________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
0 0000 0000 0000
0 0000 0000 0001
0 0000 0000 0010
0 0000 0000 0011
0 0000 0000 0100
0 0000 0000 rrrr
0 0000 0001 0000
0 0000 0001 0001
0 0000 0001 0010
0 0000 0001 0011
0 0000 0001 0100
0 0000 0001 rrrr
0 0000 0010 0000
0 0000 01rr
0 0000 1000 0000
0 0000 11rr
0 0001 00rr
0 0001 01rr
0 0001 10rr
0 0001 11rr
0 0010 00rr
0 0010 01rr
0 0010 10rr
0 0010 11rr
0 0011 00rr
0 0011 01rr
INSTRUCTION BINARY
TCC will go to address 0x08 in GREEN mode or NORMAL mode after time out. And it will run next
The symbol "R" represents a register designator which specifies which one of the 64 registers (including
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
rrrr
HEX
0000
0001
0002
0003
0004
000r
0010
0011
0012
0013
0014
001r
0020
00rr
0080
00rr
01rr
01rr
01rr
01rr
02rr
02rr
02rr
02rr
03rr
03rr
NOP
DAA
CONTW
SLEP
WDTC
IOW R
ENI
DISI
RET
RETI
CONTR
IOR R
TBL
MOV R,A
CLRA
CLR R
SUB A,R
SUB R,A
DECA R
DEC R
OR A,R
OR R,A
AND A,R
AND R,A
XOR A,R
XOR R,A
MNEMONIC
22
OPERATION
No Operation
Decimal Adjust A
A → CONT
0 → WDT, Stop oscillator
0 → WDT
A → IOCR
Enable Interrupt
Disable Interrupt
[Top of Stack] → PC
[Top of Stack] → PC
Enable Interrupt
CONT → A
IOCR → A
R2+A → R2 bits 9,10 do not
clear
A → R
0 → A
0 → R
R-A → A
R-A → R
R-1 → A
R-1 → R
A ∨ VR → A
A ∨ VR → R
A & R → A
A & R → R
A ⊕ R → A
A ⊕ R → R
8-bit OTP Micro-controller
STATUS
AFFECTE
D
None
C
None
T,P
T,P
None
None
None
None
None
None
None
Z,C,DC
None
Z
Z
Z,C,DC
Z,C,DC
Z
Z
Z
Z
Z
Z
Z
Z
EM78P811

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