ml9204 Oki Semiconductor, ml9204 Datasheet

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ml9204

Manufacturer Part Number
ml9204
Description
5 7 Dot Character 24-digit 2-line Display Controller/driver With Character Ram Built-in Key Scan
Manufacturer
Oki Semiconductor
Datasheet
GENERAL DESCRIPTION
The ML9204-xx is a 5
characters, numerics and symbols of a maximum of 24 digits 2 lines.
Dot matrix vacuum fluorescent display tube drive signals are generated by serial data sent from a
micro-controller. A display system is easily realized by internal ROM and RAM for character display.
Built-in key scan for 3-channel encoder type rotary switch and 5
each switch input.
The ML9204-xx has low power consumption since it is made by CMOS process technology.
–01 is available as a general-purpose code.
Custom codes are provided on customer’s request.
FEATURES
OKI Semiconductor
ML9204-xx
5 7 Dot Character 24-Digit 2-Line Display Controller/Driver with Character RAM (Built-in Key Scan)
Logic power supply (V
VFD tube drive power supply (V
VFD driver output current
(VFD driver output can be connected directly to the VFD tube. No pull-down resistor is required.)
• Segment driver (SEGA1 to A35, SEGB1 to B35)
• Segment driver (ADA, ADB)
• Grid driver (COM1 to 24)
Content of display
SEGA1 to SEGA35 and ADA
• CGROM_A
• CGRAM_A
• ADRAM_A
• DCRAM_A
SEGB1 to SEGB35 and ADB
• CGROM_B
• CGRAM_B
• ADRAM_B
• DCRAM_B
Display control function
• GCRAM
• Display digits
• Display duty (brightness adjustment)
• All lights ON/OFF
5 interfaces with microcontroller:DI/O, CS, CP, RESET, INT
Built-in key scan circuit for 5 6 matrix key switch
Built-in key scan circuit for 3-channel encoder type rotary switch
Built-in oscillation circuit
Crystal oscillation or ceramic oscillation: 4.0 MHz (Typ)
Standby function
Inhibiting the oscillator circuit provides low power consumption.
Package options:
128-pin plastic QFP (QFP128-P-1420-0.50-K) (ML9204-xxGA)
Only one driver output is high
All the driver outputs are high
DD
7 dot matrix type vacuum fluorescent display tube controller driver IC which displays
)
SEG
, V
COM
) : 20 to 60 V
: 3.3 V±10% or 5.0 V±10%
: –5 mA (V
: –350 mA (V
: –15 mA (V
: –25 mA (V
: 5 7 dots
: 5 7 dots
: 24 (display digit) 1 bit (symbol data; can be used for a cursor.)
: 24 (display digit)
: 5 7 dots
: 5 7 dots
: 24 (display digit) 1 bit (symbol data; can be used for a cursor.)
: 24 (display digit)
: Simultaneous output of COM1 to 24 can be set in 1 grid.
: 1 to 24 digits (9- to 24-bit arbitrary setting)
: 0/1024 to 960/1024 stages
SEG
SEG
COM
SEG
240 types (character data)
16 types (character data)
240 types (character data)
16 types (character data)
= 60 V)
= 60 V)
= 60 V)
= 60 V)
6 matrix key switch allow the user to receive
8 bits (register for character data display)
8 bits (register for character data display)
Preliminary
Issue Date: Jan. 8, 2003
PEDL9204-01
1/41

Related parts for ml9204

ml9204 Summary of contents

Page 1

... A display system is easily realized by internal ROM and RAM for character display. Built-in key scan for 3-channel encoder type rotary switch and 5 each switch input. The ML9204-xx has low power consumption since it is made by CMOS process technology. –01 is available as a general-purpose code. Custom codes are provided on customer’s request. ...

Page 2

... Selector Write Read Address Address Counter Counter Digit Control Duty Control Key Scan and Encoder Switch Interface COL1 COL6 ROW5 A1 B1 PEDL9204-01 ML9204-xx SEGA1 Segment Driver SEGA35 Segment ADA Driver SEGB1 Segment Driver SEGB35 Segment ADB Driver COM1 Grid Driver ...

Page 3

... COM18 25 COM19 26 27 COM20 COM21 28 COM22 29 COM23 30 31 COM24 V 32 COM SEGA1 33 SEGA2 34 SEGA3 35 SEGA4 36 37 SEGA5 SEGA6 38 128-Pin Plastic QFP PEDL9204-01 ML9204-xx SEGB33 102 101 SEGB34 100 SEGB35 99 ADB V 98 SEG 97 D-GND INT RESET ...

Page 4

... Input pins for return signal from key matrix with built-in pull-up resister. Key matrix When input is low level, the key matrix switch is regarded as being pressed. Dose not have chattering absorption function. PEDL9204-01 ML9204-xx Description < – < – < – ...

Page 5

... The target oscillation frequency is 4.0MHz. Crystal or (The device has an internal feedback resister.) ceramic V Typical DD resonator 3.3V 1Mohm 5.0V 0.4Mohm * For information regarding the oscillator contact the manufacturer of the oscillator regards the circuit, refer to the Application Circuit. PEDL9204-01 ML9204-xx 5/41 ...

Page 6

... V (typ When the power supply voltage is 3.3 V (typ.) — SEG — COM f Oscillation OSC f DIGIT = 1 to 24, oscillation FR T — OP PEDL9204-01 ML9204-xx Rating Unit –0.3 to +6.5 V –0.3 to +70 V –0.3 to +70 V –0 +0 470 *1) mW –55 to +150 °C –50 to +2.0 mA – ...

Page 7

... V±10 MHz f = 4.0 All output lights ON OSC V V MHz, SEG, COM All output lights OFF no load standby mode V V SEG, COM PEDL9204-01 ML9204-xx Min. Max. Unit 0.7 V — DD — 0 –1.0 +1.0 DD –1.0 +1.0 = 0.0 V –450 –100 IL = – – 2.0 — COM = – – ...

Page 8

... V = 3.3 V±10 MHz f = 4.0 All output lights ON OSC V V MHz, SEG, COM All output lights OFF no load standby mode V V SEG, COM PEDL9204-01 ML9204-xx Min. Max. Unit 0.8 V — DD 0.2 — –1.0 +1.0 DD –1.0 +1.0 = 0.0 V –120 – – – 2.0 — COM = – ...

Page 9

... COM Condition SCAN f = 3.5 to 4.5 MHz OSC and –40 to +85°C unless otherwise specified) a SEG COM Condition t ABW f = 3.5 to 4.5 MHz OSC t ABH PEDL9204-01 ML9204-xx Min. Max. Unit — 2.0 MHz 200 — ns 200 — ns 200 — ns 200 — — ...

Page 10

... DOFF VALID VALID VALID VALID VALID =Bx100/(A+B) OSC A B PEDL9204-01 ML9204-xx = 3.0 V ±10 CSW CSH –V IH – CSH –V IH – –V ...

Page 11

... After a VDD injection should surely input a reset signal RSON RESET DI/O Key Scan Timing ROW1 ROW2 ROW3 ROW4 ROW5 VALID Vp-p (stationary state oscillation level) t RSOFF VALID t SCAN t WSCAN PEDL9204-01 ML9204-xx –V IH –V IL –V IH –V IL –V IH –V IL –0 –0 WRES –V IH –V IL –V IH – ...

Page 12

... COM2 COM3 COM4 COM5 COM20 COM21 COM22 COM23 COM24 ADA, ADB, SEGA1~A35, SEGB1~B35 ABH ABH ABW (f = 4.0 MHz : t = 6.144ms 24576T OSC 4.0 MHz : t = 240µ 960T OSC 4.0 MHz : t = 16µ 64T OSC 3 3 PEDL9204-01 ML9204-xx t ABW V COM D-GND V SEG D-GND 12/41 ...

Page 13

... Don’t care Xn : Address specification for each RAM Cn : Character code specification for each RAM Dn : Display duty specification Kn : Number of digits specification H : All lights ON instruction L : All lights OFF instruction PEDL9204-01 ML9204-xx 2nd byte * 2nd byte * 3rd byte * 4th byte * 5th byte * 6th byte ...

Page 14

... Corresponds to the 6th byte of the CGRAM_B data write command. Corresponds to the 5th byte of the CGRAM_B data write command. Corresponds to the 4th byte of the CGRAM_B data write command. Corresponds to the 3rd byte of the CGRAM_B data write command. Corresponds to the 2nd byte of the CGRAM_B data write command. PEDL9204-01 ML9204-xx 14/41 ...

Page 15

... Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later bytes. t DOFF MSB LSB MSB 2nd byte Character code data PEDL9204-01 ML9204-xx t CSH LSB MSB 3rd byte Character code data of the next address 15/41 ...

Page 16

... INT ................................................... INT goes “Low.” Be sure to execute the reset operation when turning power on and set again according to “Setting Flowchart” after reset. t CSH MSB LSB MSB Key data output mode PEDL9204-01 ML9204-xx VALID Data output (42-bit) 16/41 ...

Page 17

... DCRAM address 00H) MSB : specifies character code of CGROM and CGRAM (written into DCRAM address 01H) MSB : specifies character code of CGROM and CGRAM (written into DCRAM address 02H) MSB : specifies character code of CGROM and CGRAM (written into DCRAM address 17H) PEDL9204-01 ML9204-xx 17/41 ...

Page 18

... DCRAM address DCRAM address COM (HEX) 0C COM13 0D COM14 COM15 0E COM16 0F 10 COM17 11 COM18 COM19 12 COM20 13 COM21 14 COM22 15 Dummy is put in to set up a DCRAM address from 00H continuously. 16 COM23 17 COM24 PEDL9204-01 ML9204-xx COM (HEX) 18 Dummy 19 Dummy 1A Dummy 1B Dummy 1C Dummy 1D Dummy 1E Dummy 1F Dummy 18/41 ...

Page 19

... CGRAM address 00H) MSB * : specifies 3rd column data (rewritten into CGRAM address 00H) MSB * : specifies 4th column data (rewritten into CGRAM address 00H) MSB * : specifies 5th column data (rewritten into CGRAM address 00H) PEDL9204-01 ML9204-xx (address) by time DOFF 19/41 ...

Page 20

... CGRAM address 0FH) MSB * : specifies 5th column data (rewritten into CGRAM address 0FH) MSB * : specifies 1st column data (rewritten into CGRAM address 00H) MSB * : specifies 5th column data (rewritten into CGRAM address 00H) PEDL9204-01 ML9204-xx 20/41 ...

Page 21

... PEDL9204-01 ML9204- CGROM address 0 1 RAM08 (00001000B ...

Page 22

... ADRAM data write mode 0 0/1 MSB * * : sets symbol data (written into ADRAM address 00H) MSB : sets symbol data * * (written into ADRAM address 01H) MSB : sets symbol data * * (written into ADRAM address 02H) MSB : sets symbol data * * (written into ADRAM address 17H) PEDL9204-01 ML9204-xx 22/41 ...

Page 23

... ADRAM address ADRAM address COM (HEX) 0C COM13 0D COM14 COM15 0E COM16 0F 10 COM17 11 COM18 COM19 12 COM20 13 COM21 14 Dummy is put in to set up a ADRAM COM22 15 address from 00H continuously. 16 COM23 17 COM24 PEDL9204-01 ML9204-xx COM (HEX) 18 Dammy 19 Dammy 1A Dammy 1B Dammy 1C Dammy 1D Dammy 1E Dammy 1F Dammy 23/41 ...

Page 24

... GCRAM outputs specified data directly to COMn, allowing COM outputs to be controlled arbitrarily also possible to supply a large current by connecting a plurality of COMs outside the ML9204. For example, when COM23 and COM24 are connected, the ML9204 has 23 display digits. In this case, the user specifies “23” as the number of display digits. ...

Page 25

... C1 C2 C21 C1 C2 C21 • • • • • C21 C1 C2 C21 C1 C2 C21 C1 C2 C21 C1 C2 C21 PEDL9204-01 ML9204-xx 23(16) 24(17) C22 C23 C22 C23 C22 C23 C22 C23 C22 C23 C22 C23 C22 C23 C22 C23 C22 C23 C22 C23 ...

Page 26

... Strap PEDL9204-01 ML9204-xx 11(09) 11(0A) 23(16) 24(17 ...

Page 27

... Write "0" also in the beam which is not used. 5(04) 8(07) 6(05) 7(08 Strap PEDL9204-01 ML9204-xx 11(09) 9(08) 22(15) 23(16 COM1 GRID1 COM2 GRID2 COM3 GRID3 COM22 GRID22 ...

Page 28

... Don’t care PEDL9204-01 ML9204-xx COM duty 0 0/1024 0 1/1024 0 2/1024 1 958/1024 1 959/1024 1 960/1024 1 960/1024 1 960/1024 28/41 ...

Page 29

... PEDL9204-01 ML9204-xx Number of digits COM 1-16(COM1 to 16 1-17(COM1 to 17 1-18(COM1 to 18 1-19(COM1 to 19 ...

Page 30

... L H Display state of SEG and Normal display 1 0 Sets all outputs to Low 0 1 Sets all outputs to High 1 1 Sets all outputs to High MSB : selects all display lights ON or OFF mode * Priority is given to an all-points light command. PEDL9204-01 ML9204-xx 30/41 ...

Page 31

... outputs key data. ROW5 ROW3 ROW4 ROW2 S11 S21 S31 S41 S12 S22 S32 S42 S13 S23 S33 S43 S14 S24 S34 S44 S15 S25 S35 S45 S16 S26 S36 S46 PEDL9204-01 ML9204-xx S51 S52 S53 S54 S55 S56 31/41 ...

Page 32

... S21 S22 S33 S34 S35 S36 S41 S42 S53 S54 S55 S56 R1 Q11 Q31 Q32 Q33 PEDL9204-01 ML9204- S23 S24 S25 S26 S43 S44 S45 S46 Q12 Q13 R2 Q21 32/41 ...

Page 33

... To stop keyscanning required to select the keyscan stop mode once again. Depress Keyscan INT CS KS Depress Release Keyscan KS KS: Keyscan stop mode PEDL9204-01 ML9204-xx keyscan stop KS 33/41 ...

Page 34

... INT also goes to high level, so this signal can be used as an interrupt. The INT stays High level until the keyscan stop mode is selected chattering absorption time UP (internal) INT The Input and Output Timing in the Case of Clockwise Rotation B Interrupt Generation Direction Latch R1 The Rotary Encoder Switch Circuit PEDL9204-01 ML9204-xx for INT Output data 34/41 ...

Page 35

... When the Direction latch is input DOWN the output R1 goes “1”. But if the UP pulse is input and the count value changes to a positive value, the output R1 goes to “0” Q1, Q2, Q3 100 110 001 101 Counter Overflow 010 100 Direction Latch PEDL9204-01 ML9204-xx 011 111 111 000 100 010 35/41 ...

Page 36

... Oscillation unstable state (oscillation standup time) Oscillation start MSB : Standby mode is specified RSON * May not place the section. Usually, a state of operation (all putting-out-lights states) 0.9Vp-p Oscillation stable state PEDL9204-01 ML9204-xx Data input LSB MSB 1st byte Vp-p 36/41 ...

Page 37

... Is character code write ended? write ended? YES Another RAM to YES be set? NO Releases all display lights OFF mode End of setting PEDL9204-01 ML9204-xx Status of all outputs by RESET GCRAM Data write mode Address is automatically incremented GCRAM code ADRAM GCRAM NO write ended? YES Display operation mode ...

Page 38

... ANODE (SEGMENT) (SEGMENT) (SEGMENT) (DIGIT ADA,ADB SEGB1-B35 SEGA1-A35 COM1- DI/O ML9204-xx INT RESET OSC0 OSC1 L-GND D-GND A1-3 B1-3 5x6Key matrix *3 and rotary switch and V voltages used. COM PEDL9204-01 ML9204-xx GRID SEG V COM COL1 - 6 ZD ROW1-5 38/ SEG COM ...

Page 39

... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). PEDL9204-01 ML9204-xx (Unit: mm) Package material Epoxy resin Lead frame material ...

Page 40

... OKI Semiconductor REVISION HISTORY Document Date No. PEDL9204-01 Jan. 8, 2003 Page Description Previous Current Edition Edition – – Preliminary edition 1 PEDL9204-01 ML9204-xx 40/41 ...

Page 41

... The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these part of the contents contained herein may be reprinted or reproduced without our prior permission. PEDL9204-01 ML9204-xx Copyright 2003 Oki Electric Industry Co., Ltd. 41/41 ...

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