ATS75D8 ETC2 [List of Unclassifed Manufacturers], ATS75D8 Datasheet - Page 7

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ATS75D8

Manufacturer Part Number
ATS75D8
Description
LOW- OLTAGE 2-WIRE DIGITAL TEMPERATURE SENSOR With Thermal Alarm
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATS75D8T
Manufacturer:
ANADIGICS
Quantity:
1 818
Temperature Register
The Temperature Register is a two-byte (16-bit) read-only
register. Digital temperatures from the T-to-D converter are
stored in the Temperature Register in two’s complement
format, and the contents of this register are updated at
regular intervals—i.e., each time the T-to-D conversion is
finished.
The user can read data from the Temperature Register at
any time. When a T-to-D conversion is completed, the new
data is loaded into a comparator buffer to evaluate fault
conditions, and will update to the Temperature Register if a
read cycle is not ongoing. The aTS75 is continuously
evaluating fault conditions regardless of read or write
activity on the bus. If a read is ongoing, the previous
temperature will be read. The readable temperature will be
updated upon the completion of the next T-to-D conversion
that is not masked by a read cycle.
The Temperature Register is illustrated in Figure 4.
Depending on the resolution of the T-to-D conversion, the
9, 10, 11 or 12 LSB's of the register will contain
temperature data.
temperature will be zero.
Temperature Register always contains the sign bit for the
digital temperature and bit 14 contains the temperature
MSB. All bits in the Temperature Register default to zero at
power-up.
© Andigilog, Inc. 2005
MSB
SB
SB = Two’s complement sign bit
TMSB = Temperature MSB
T = Temperature data
9-bit LSB = Temperature LSB for 9-bit conversions
10-bit LSB = Temperature LSB for 10-bit conversions
11-bit LSB = Temperature LSB for 11-bit conversions
12-bit LSB = Temperature LSB bit for 12-bit conversions
Figure 4. Temperature Register Format
9-bit
LSB
TMSB
7
14
10-bit
LSB
6
13
T
All unused bits following the digital
11-bit
LSB
5
12
T
12-bit
LSB
4
11
T
The MSB position of the
0
3
10
T
0
2
9
T
0
1
T
8
www.andigilog.com
LSB
0
- 7 -
Configuration Register
The Configuration Register is a one-byte (8-bit) read/write
register (see Figure 5).
control the aTS75 Shutdown Mode as well as the following
thermal alarm features: polarity, operating mode, and fault
tolerance. The Configuration Register contains two bits that
set the fault tolerance trip point. The fault tolerance trip
point is the number of consecutive times the internal circuit
reads the temperature and finds the temperature outside of
the limits programmed. The programmed limits are defined
by the T
Register for the lower limit. Table 4 shows the relationship
between F1 and F0 and the number of consecutive errors
or "trips" needed to activate the alarm. The Configuration
Register also contains two bits that set the T-to-D
conversion resolution to 9-, 10-, 11-, or 12-bits. Table 3
shows the relationship between R1 and R0 and the
conversion resolution. All bits in the Configuration Register
default to zero at power-up.
R1 = Resolution bit 1. (See Table 3)
R0 = Resolution bit 0 . (See Table 3)
F1 = Fault tolerance bit 1. (See Table 4)
F0 = Fault tolerance bit 0 . (See Table 4)
POL = O.S. output polarity. 0 = active low, 1 = active high.
CMP/INT = Thermostat mode.
SD = Shutdown. 0 = normal operation. 1 = Shutdown Mode
MSB
X
Table 3. Conversion Resolution Settings
Figure 5. Configuration Register Format
OS
R1
Table 4. Fault Tolerance Settings
Register for the upper limit, and by the T
0 = Comparator Mode, 1 = Interrupt Mode.
A-to-D Conversion
R0
Resolution
Tolerance
10 Bits
11 Bits
12 Bits
9 Bits
Fault
F1
1
2
4
6
This
F0
register allows the user to
F1
0
0
1
1
POL
April 2006 - 70A03204
R1
0
0
1
1
F0
0
1
0
1
CMP/
INT
R0
0
1
0
1
aTS75
SD
LSB
HYST

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