SS8017TR SSC [Silicon Standard Corp.], SS8017TR Datasheet - Page 15

• Manufacturer Part Number: SS8017TR
• Description: Two Remote Temperature Sensors with SMBus Serial Interface and System Reset
• Manufacturer: SSC [Silicon Standard Corp.]

Rev.2.01 6/06/2003
though reads and writes at V
recommended. A second Vcc comparator, the ADC
UVLO comparator, prevents the ADC from converting
until there is sufficient headroom (Vcc = 2.8V typical).
Power-Up Defaults:
n
n
n
A = start condition
B = MSB of address clocked into slave
C = LSB of address clocked into slave
D = R / W bit clocked into slave
E = slave pulls SMB Data line low
F = acknowledge bit clocked into master
G = MSB of data clocked into slave
A = start condition
B = MSB of address clocked into slave
C = LSB of address clocked into slave
D = R / W bit clocked into slave
E = slave pulls SMBDATA line low
F =acknowledge bit clocked into master
Interrupt latch is cleared.
ADC begins auto /converting at a 0.25Hz rate.
Command byte is set to 00h to facilitate quick r e-
mote Receive Byte queries.
SMBCLK
SMBDATA
SMBCLK
SMBCLK
SMBDATA
SMBDATA
t
t
t
SU:STA
SU:STA
S U:STA
A
A
A
t
t
t
HD :STA
HD :STA
HD:STA
t
t
t
LOW
LOW
LOW
CC
B
B
B
levels below 3V are not
t
t
t
HIGH
HIGH
HIGH
Figure 6. SMBus Write Timing Diagram
Figure 7. SMBus Read Timing Diagram
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t
t
t
SU:DAT
SU:DAT
SU :DAT
C
C
C
D
D
D
H = LSB of data clocked into slave
I = slave pulls SMBDATA line low
J = acknowledge clocked into master
K = acknowledge clocked pulse
L = stop condition data executed by slave
M = new start condition
G = MSB of data clocked into master
H = LSB of data clocked into master
I = acknowledge clocked pulse
J = stop condition
K= new start condition
E F
E F
E F
n
Thermal Shutdown Signal
When the temperature of DX1 reaches or exceeds the
Tcrit1 threshold consecutively for the times equal to
the number of faults of the FQ_TH_SHUT registers,
TH_SHUT pin becomes logic high. The same mecha-
nism is d uplicated for DX2. There fore, either one of
DX1, DX2 continuously over their r e spective Tcrit, the
TH_SHUT will assert logic high to i n dicate a thermal
shutdown event.
THIGH and TLOW registers are set to max and min
limits, respectively
t
HD:DAT
G
G
G
H
H
H
I J
I
I
t
t
SU:STO
SU:STO
K
J
J
t
S U:STO
t
t
BUF
BUF
L
SS8017
K
K
t
BUF
M
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