T2802 ATMEL [ATMEL Corporation], T2802 Datasheet - Page 21
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T2802
Manufacturer Part Number
T2802
Description
2.4 GHz WDECT/ISM SINGLE-CHIP TRANSCEIVER
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.T2802.pdf
(29 pages)
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Output Power Settings
Figure 4. 3-Wire Bus Protocol Timing Diagram
Figure 5. TX DATA Timing
4509F–DECT–10/03
Description
Clock period
Set time data to clock
Hold time data to clock
Clock pulse width
Set time enable to clock
Hold time enable to data
Time between two protocols
Set-up time TX DATA
Hold time TX DATA
DATA
CLOCK
ENABLE
TX_DATA
RefCLK
TL
With bits E11 - E12
TS
TH
T
S
T
H
E12
0
0
1
1
> 8 ns
> 8 ns
Symbol
TPER
TEC
TS
TH
TC
TPER
TL
TT
When using REFCLK = 10.368 MHz, TS and TH must be
considered for falling and rising edge of REFCLK
PA (Output Power Settings)
TS
TC
TH
E11
Minimum Value
0
1
0
1
125
125
200
250
60
60
0
TEC
TT
-21 dBm
-11 dBm
+3 dBm
-4 dBm
PA
Unit
ns
ns
ns
ns
ns
ns
ns
T2802
21