cxa3003r Sony Electronics, cxa3003r Datasheet
cxa3003r
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cxa3003r Summary of contents
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... Baseband analog processing IC for dual-mode CDMA/FM cellular phone For the availability of this product, please contact the sales office. Description The CXA3003R is a baseband analog processing IC for dual-mode CDMA/FM cellular phone. The CXA3003R interfaces between the inter-frequency section and the digital processing circuitry of the telephone ...
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... ADCENBL 76 ADCIN 77 SLEEPB 78 IDLEB 79 FMB 80 RXVCOOUT —2— CXA3003R TXD0 39 GND ESD 38 VDD DAC 37 GND DAC DNC 33 DNC 32 CAP2 31 CAP1 TCXO4 TCXO ...
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... GND RXIF VDD RXIF 150 8 GND RXIF —3— CXA3003R Description Negative power supply pin. Receive VCO tuning pins. Connected to an external LC tank circuit for setting the receive VCO frequency. Negative power supply pin for RXIF block. Positive power supply pin for RXIF block ...
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... Positive power supply pin for TXIF block. VDD TXF 150 Analog baseband signal output 15 pin for FM. GND TXF 16 17 VDD TXIF 1k 1k Transmit VCO tuning pins. Connected to an external LC tank circuit for setting the transmit VCO frequency. GND TXIF —4— CXA3003R Description ...
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... Negative power supply pin for PLL block. Positive power supply pin for PLL block. Negative power supply pin for TX block. Positive power supply pin for TX block. VDD SYNTH 150 Transmit IF synthesizer lock 24 detect output pin. GND SYNTH —5— CXA3003R Description ...
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... GND SYNTH VDD DAC 150 29 GND ESD VDD GND RX —6— CXA3003R Description Input pins for External clock 19.68 MHz (TCXO). Negative power supply pin. Don't connect pins. Output pin for TCXO/4 frequency. The pins for External Capacitor. Don't connect any line to this pin ...
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... GND BUF VDD ADC 100k 61 62 GND ADC —7— CXA3003R Description Positive power supply pin for TXDA block. Transmit Data input pins for Transmit 8 bit D/A converter. TXD7 is the MSB. Differential transmit Clock input pins for Transmit 8 bit D/A converter. Negative power supply pin for A/D output block ...
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... Positive power supply pin for A/D converter block. VDD RX Receive Q channel offset adjust input pin. 30k 30k 142k 142k 22k 69 150 70 Receive I channel offset adjust 150 100k input pin. GND RX Positive power supply pin for HKA/D converter block. Don't connect pin. —8— CXA3003R Description ...
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... VDD BUF 60k 75 GND BUF HKADVCC 76 48.5k GND ADC —9— CXA3003R Description Clock output pin for House Keeping 8 bit A/D converter. Serial data output pin for House Keeping 8 bit A/D converter. Enable input pin for House Keeping 8 bit A/D converter. A/D analog input pin for House ...
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... This mode powers down all CDMA-specific circuits except the CHIPx8 synthesizer Idle This mode powers down all transmit and CDMA Receive circuits. —10— CXA3003R Description Test mode switch pins. These pins control this IC function mode ( 1). Receive VCO output pin connected the external PLL IC ...
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... VOL Cin-d 1 Cl-d 1 Rl-d 1 Symbol Condition tsua tha tha TXQ Data Symbol Condition tsub thb trb Cload=15 pF tfb —11— CXA3003R (VDD=3.3 V±5 %, Ta=40 ° °C) Min. Typ. Max. Unit 0.7xVDD 0.3xVDD V 2.7 0.4 –100 100 µA ...
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... Symbol Condition tsuc thc tsuc thc TX Data XXXX TX Data VDD=3.3 V±5 %, Ta=–40 ° °C Symbol Condition tsud-s thd-s tsud-d thd-d tclk-hi tclk-lo trd Cload=15 pF tfd —12— CXA3003R Min. Typ. Max. Unit 2.08 µs 2.08 XXXX Min. Typ. Max. Unit 0.69 2.08 1.38 µs 1.38 1.38 1.38 3 7.2 ...
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... MSB MSB-1 one FMCLK period. (VDD=3.3 V±5 %, Ta=–40 ° °C) Symbol Condition ten-clk tdEn-EOC tsue-d the-d ten-pw tre Cl=15 pF tfe tsue-d the-d MSB tdEn-EOC —13— CXA3003R thd-d thd-s tsud-s LSB Min. Typ. Max. Unit 6 µs 16.8 600 ns 600 10 µs 7 ...
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... Nominal Impedance into Zit each pin Vext VDD=3.3 V±5 %, Ta=–40 ° °C Symbol Condition fvcor Into 500 //5 pF load, Vovr AC coupled load Nominal impedance into Zir each pin —14— CXA3003R Min. Typ. Max. Unit 260.76 MHz 12.4 15.5 18.6 µA 128 160 192 –40 ...
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... Gadjocr Ziocr Ladcr Full scale Gspcr At nominal temp and VDD Over part to part, Gstcr VDD, temp RSpcr FA1cr 900 kHz FA2cr 1.2 MHz Gfcr 1 kHz to 630 kHz —15— CXA3003R Min. Typ. Max. Unit 0.9 mVrms 5.38 mVp-p 0.13 0.5 dB 85.38 220.38 MHz 375 500 650 1.5 pF ...
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... In band, Measured Perrct In band, Measured Afct Including SIN(X)/X VDD=3.3 V±5 %, Ta=–40 ° °C Symbol Condition fic8 TCXO foc8 TCXO x 512/1025 tsc8 upon mode charge —16— CXA3003R Min. Typ. Max. Unit 267 300 337 mVp-p 495 500 505 ...
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... At nominal temp Peak in-band spurious Gadjfr product Gspfr Gspfr At nominal VDD and temp Over part to part ,VDD, Gstfr temp RSpfr Gffr From 100 Hz to 12.2 kHz FA1fr >45 kHz FA2fr >60 kHz —17— CXA3003R Min. Typ. Max. Unit 1.53 mVrms 0.07 0.35 dB 85.38 MHz 375 500 650 1 µ ...
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... Single tone, full scale Afft Including SIN ( VDD=3.3 V±5 %, Ta=–40 ° °C Symbol Condition fitc From TCXO Vitc AC Coupled Zitc Rtdtc Into Vo-tc AC coupled Load —18— CXA3003R Min. Typ. Max. Unit 124 140 161 mVp-p 495 500 505 ...
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... Nsprs At nominal temp and VDD VDD=3.3 V±5 %, Ta=–40 ° °C Symbol Condition Reshk Vihk Internal Voltage referenced Emidhk V (ADCIN)=1.5 V Dlehk Ilehk At nominal temp and VDD tchk Zihk —19— CXA3003R Min. Typ. Max. Unit mV/dB –1.6 1.6 dB 0.5 2 µ ...
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... CXA3003R 0.01µ 0.01µ 51k V Spectrum Analyzer —20— CXA3003R Pattern Generator TXD0 39 GND ESD 38 VDD DAC 37 GND DAC DNC 33 DNC 32 CAP2 31 CAP1 30 NC ...
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... CXA3003R 0.01µ 51k 0.01µ 56p 1T367 From Receive To Transmit RF Circuits RF Circuits 10k —21— CXA3003R From Digital Processing section TXD0 39 GND ESD 38 VDD DAC 37 GND DAC DNC 33 DNC ...
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... VCO to 170.76 MHz. A master-slave divide-by-two circuit generates I and Q signals in precise quadrature for the mixers. RF CXA3003R Transmit/ Baseband Receive Analog Processing Processor The digital processing CODEC Mobile Station Modem —22— CXA3003R ...
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... RXIFB RXIF TCXO Fig. 7 Receive Section Block Diagram of CXA3003R 3. CDMA Low-Pass Filtering After mixing, the receive signal path splits into CDMA and FM sections. For CDMA, the baseband signal extends from 1 kHz to 630 kHz. Frequency components above 750 kHz are out-of-band for CDMA operation ...
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... TXD0 TCXO PD ISET Fig. 8 Transmit Section Block Diagram of CXA3003R 7. CDMA Digital to Analog Conversion and Filters Eight bits of I and Q transmit data are input to the CDMA digital to analog converters (DACs) by multiplexing over an 8-bit input port on the this IC. The transmit data rate is twice as fast as the differential transmit clock, TXCLK and TXCLKB ...
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... ADCIN, and begins a conversion. The ADC output is available from a serial digital interface. Each of the eight data bits is valid (MSB first) during the rising edge of the ADCCLK output. A rising edge of ADCENBL during a conversion will be ignored. ADCENBL must be low and a conversion completed before a new conversion can be started. —25— CXA3003R ...
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... The transmit IF outputs, TXIF and TXIFB, are differential outputs. The output impedance is low, 40 nominally. These signals transfer to the subsequent transmit IF circuitry by using AC coupling. AC coupling capacitor values (0.001 µF) are chosen to maximize the power transfer from the CXA3003R to the subsequent transmit IF circuitry. ...
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... The transmit synthesizer consists of a VCO, a divide-by-two phase splitter, divide by R and N counters, and a phase detector. The VCO and divide-by-two generate the I and Q IF signals used to up-convert analog baseband to IF. The loop filter and tuning components are external to the CXA3003R. 1 ...
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... The FMMOD output is used to frequency modulate the transmit VCO. The output voltage swing on FM MOD is normally 550 mVp-p. This modulating voltage must be scaled to achieve the required frequency deviation of the transmit VCO frequency when the CXA3003R is operating in FM mode. A ±30 kHz deviation of the transmit VCO frequency translates into a ±15 kHz deviation of the transmit IF frequency. ...
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... ADC and DAC Ranges All ADCs and DACs on the CXA3003R have internally-generated references which eliminate the need for additional adjustment or calibration of the ADCs and DACs. All ADCs and DACs employ offset-binary coding (Tables 2 and 3). The application of the House Keeping ADC is left up to the user. However, it can be useful for monitoring parameters such as battery voltage and temperature ...
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... FM low-pass filters to the center of the CDMA and FM ADC input range, reducing the offset to zero. 11. Receive Low Pass Filters In CXA3003R, the receive low-pass filters remove residual IF frequency components and present baseband I and Q components to the ADCs. The CDMA baseband signal extends from 1 kHz to 630 kHz ...
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... The voltage regulator used in telephone for the CXA3003R should be a linear voltage regulator, not a switching regulator. This is to keep power supply noise on the CXA3003R power inputs as low as possible. The recommended power supply voltage range of the CXA3003R is from 3.13 to 3.47 V (3.3±5 %). It is recommended that a ± ...
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Package Outline Unit : 0.5 ± 0.08 0.1 ± 0.1 0° to 10° DETAIL A LQFP-80P-L01 SONY CODE EIAJ CODE JEDEC CODE 80PIN LQFP (PLASTIC) 14.0 ± 0.2 12.0 ± 0 ...