cxp85452 Sony Electronics, cxp85452 Datasheet
cxp85452
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cxp85452 Summary of contents
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... CMOS 8-bit Single Chip Microcomputer Description The CXP85452/85460 are a highly integrated micro- computers composed of a 8-bit CPU, ROM, RAM, and I/O ports. These chips feature many other high- performance circuits in a single-chip CMOS design, including an A/D converter, timer/counter, time-base timer, on-screen display 2 function, I ...
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... CXP85452/85460 ...
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... DD – 3 – CXP85452/85460 PF0/PWM0 PF1/PWM1 PF2/PWM2 PF3/PWM3 PF4/PWM4/SCL0 PF5/PWM5/SCL1 PF6/PWM6/SDA0 PF7/PWM7/SDA1 EXLC XLC PE0/INT0 PE1/INT1 AN0/PE2 AN1/PE3 AN2/PE4 AN3/PE5 PE6/PWM PE7/TO ...
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... Note (Pin 56) is always connected Vss (Pins 26 and 58) are both connected to GND (Pin 55) is always connected to GND – 4 – CXP85452/85460 53 52 PF3/PWM3 51 PF4/PWM4/SCL0 50 PF5/PWM5/SCL1 49 48 PF6/PWM6/SDA0 47 PF7/PWM7/SDA1 ...
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... Large current (12mA) N-ch open drain output. Lower 4 bits are mid-voltage drive (12V); upper 4 bits are 5V drive. (8 pins) OSD display 6-bit output pin. (6 pins) – 5 – CXP85452/85460 bus interface transfer clock I/O pin. (2 pins bus interface transfer data I/O pin. (2 pins) ...
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... System reset pin for active at low level. This pin becomes I/O pin, and outputs low level at the power on with power-on reset function executed. (Mask option) Test mode input pin. Always connect to GND. NC. Under normal operation, connect to V Positive supply voltage pin. GND. Both Vss pins should be connected to common GND. – 6 – CXP85452/85460 . DD ...
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... Port A data Port A direction “0” when reset Schmitt input Input multiplexer “0” when reset Port D data Port D direction “0” when reset Schmitt input – 7 – CXP85452/85460 When reset Hi-Z Input protection IP circuit IP Hi-Z ∗ Hi-Z IP ∗ Large current 12mA ...
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... Circuit format Port D data Schmitt input Schmitt input IP RD (Port E) Input multiplexer IP Port E function selection “0” when reset TO, PWM – 8 – CXP85452/85460 When reset ∗ IP ∗ Large current 12mA (Interrupt circuit) Data bus To A/D converter Data bus RD (Port E) High level Hi-Z Hi-Z ...
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... Circuit format PWM SCL, SDA PWM IP Schmitt input Writing data to output polarity register brings output to active IP IP – 9 – CXP85452/85460 When reset ∗ ∗ 12V voltage drive Large current 12mA ∗ BUS SW To internal pins ∗ Large current 12mA Oscillator control ...
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... Circuit format • Shows the circuit composition during oscillation. IP • Feedback resistor is removed during STOP. (This device does not enter the STOP mode.) Pull-up resistor Schmitt input OP From power-on reset circuit (Mask option) – 10 – CXP85452/85460 When reset Oscillation Low level ...
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... V DD ∗ EXTAL pin ∗ 0.4 –0.3 V +75 –20 °C – 11 – CXP85452/85460 (Vss = 0V reference) Unit Remarks PF0 to PF3 pins mA mA Total of all output pins Ports excluding large current mA output (value per pin) Large current output port mA (value per pin) ∗ ...
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... C = 22pF STOP mode ∗ 5.5V, DD termination of 8MHz oscillation PA to PD, PE0 to PE5, SCL, 1MHz clock SDA, EXLC, 0V for non-measurement pins EXTAL, RST – 12 – CXP85452/85460 (Ta = –20 to +75°C, Vss = 0V reference) Min. Typ. Max. = –0.5mA 4 –1.2mA 3 1.8mA OL = 3.6mA OL = 12.0mA ...
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... EXTAL External clock drive , Fig 1, Fig 2 EXTAL External clock drive , EC Fig Fig XTAL – 13 – CXP85452/85460 = 4.5 to 5.5V, Vss = 0V reference) DD Min. Max. 3 200 sys + 50 ∗ upper 2 bits H V – 0. External clock EXTAL XTAL OPEN 0 ...
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... SCK output mode SCK input mode SO SCK output mode t KCY SIK KSI 0.8V Input data 0.2V t KSO 0.8V DD Output data 0.2V DD – 14 – CXP85452/85460 = 4.5 to 5.5V, Vss = 0V reference) DD Min. Max. 1000 8000/fc 400 4000/fc – 50 100 200 200 100 200 100 KH 0. Unit ns ns ...
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... A/D control registor (ADC: 00F6 (PCK1) and 6 (PCK0) of the clock control registor (CLC: 00FE CKS PCK1 (φ / (φ / (φ /16) EX – 15 – CXP85452/85460 = 4.5 to 5.5V, Vss = 0V reference) DD Min. Typ. Max. 8 ±3 – 4910 4970 5030 ∗ 3 ...
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... Pin Condition t INT0 INT2 IL t RST RSL RSL 0.2V DD (Ta = –20 to +75° 4.5 to 5.5V, Vss = 0V reference) DD Pin Condition Power-on reset V DD Repeated power-on reset – 16 – Min. Max. Unit 1 µs 8/fc µ 0.2V DD Min. Max. Unit 0. 0.2V t OFF CXP85452/85460 ...
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... F t SDA, SCL SU; STO HD; DAT HIGH SU; DAT device device – 17 – CXP85452/85460 = 4.5 to 5.5V, Vss = 0V reference) DD Condition Min. Max. 0 100 4.7 4.0 4.7 4.0 4.7 0 ∗ 1 250 1 300 4.7 t HD; STA t t SU; STA SU; STO Unit kHz µs µ ...
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... OSC XLC t HSYNC Fig. 11 HWD t HSYNC Fig. 11 VWD t HSYNC Fig. 11 HCG t VSYNC Fig. 11 VCG t HWD ) H t VCG t VWD 0. 0.2V DD EXLC XLC R ∗ – 18 – CXP85452/85460 Unit Min. Max. 7 ∗ MHz 14 ∗ 2 1.2 µs H ∗ 200 ns µs 1.0 t HCG 0. ...
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... Reset pin pull-up resistor Power-on reset circuit (ii) EXTAL XTAL XTAL Model fc (MHz) C (pF) 1 4.00 4.19 8. 4.00 1 4.19 1 8.00 4.00 12 4.19 8.00 4.00 27 4.19 8.00 and C 1 Inclusion Non-existent Existent Non-existent Existent – 19 – CXP85452/85460 Rd Circuit C (pF) Rd (Ω) 2 Example (i) 0 ∗ (ii) 0 ∗ (i) 0 ∗ ( ...
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... OSC 2π√ – Capacitance [pF – 20 – 25°C, Typical frequency mode 2 1 frequency mode 4 1 frequency mode 16 SLEEP mode – System clock [MHz] 5.0MHz 6.5MHz 13.0MHz 100 CXP85452/85460 ...
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... PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT SOLDER PLATING SDIP-64P-01 P-SDIP64-17.1x57.6-1.778 LEAD MATERIAL PACKAGE MASS 8.6g ITEM SPEC. ALLOY 42 Sn-Bi 2.5% 5-18μm – 21 – 0˚ to 15˚ EPOXY RESIN SOLDER PLATING 42/COPPER ALLOY 0˚ to 15˚ EPOXY RESIN 42/COPPER ALLOY CXP85452/85460 ...
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... LEAD TREATMENT QFP-64P-L01 P-QFP64-14x20-1.0 LEAD MATERIAL PACKAGE MASS ITEM SPEC. ALLOY 42 Sn-Bi 2.5% 5-18μm – 22 – + 0.1 0.15 – 0.05 0.15 + 0.2 0.1 – 0.05 + 0.35 2.75 – 0.15 0 ˚ to10 ˚ M EPOXY RESIN SOLDER PLATING 42/COPPER ALLOY 1.5g + 0.1 0.15 – 0.05 0.15 + 0.2 0.1 – 0.05 + 0.35 2.75 – 0.15 0 ˚ to10 ˚ M EPOXY RESIN SOLDER PLATING 42/COPPER ALLOY 1.5g CXP85452/85460 Sony Corporation ...