ST72321B STMICROELECTRONICS [STMicroelectronics], ST72321B Datasheet - Page 30

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ST72321B

Manufacturer Part Number
ST72321B
Description
64/44-pin 8-bit MCU with 32 to 60K Flash/ROM, ADC, five timers, SPI, SCI, I2C interface
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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SYSTEM INTEGRITY MANAGEMENT (Cont’d)
6.4.2.2 Monitoring a Voltage on the EVD pin
This mode is selected by setting the AVDS bit in
the SICSR register.
The AVD circuitry can generate an interrupt when
the AVDIE bit of the SICSR register is set. This in-
terrupt is generated on the rising and falling edges
Figure 18. Using the Voltage Detector to Monitor the EVD pin (AVDS bit=1)
6.4.3 Low Power Modes
6.4.3.1 Interrupts
The AVD interrupt event generate an interrupt if
the corresponding Enable Control Bit (AVDIE) is
30/187
WAIT
HALT
AVDF
AVD INTERRUPT
REQUEST
IF AVDIE = 1
Mode
V
V
IT+(EVD)
IT-(EVD)
No effect on SI. AVD interrupts cause the
device to exit from Wait mode.
The SICSR register is frozen.
V
EVD
0
Description
INTERRUPT PROCESS
V
hyst
1
of the comparator output. This means it is generat-
ed when either one of these two events occur:
The EVD function is illustrated in
For more details, refer to the Electrical Character-
istics section.
set and the interrupt mask in the CC register is re-
set (RIM instruction).
AVD event
– V
– V
Interrupt Event
EVD
EVD
rises up to V
falls down to V
Event
AVDF
Flag
IT+(EVD)
IT-(EVD)
Control
Enable
AVDIE
Bit
INTERRUPT PROCESS
Figure
0
from
Wait
Exit
Yes
18.
from
Halt
Exit
No

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