ST72321B STMICROELECTRONICS [STMicroelectronics], ST72321B Datasheet - Page 76

• Manufacturer Part Number: ST72321B
• Description: 64/44-pin 8-bit MCU with 32 to 60K Flash/ROM, ADC, five timers, SPI, SCI, I2C interface
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

16-BIT TIMER (Cont’d)
Notes:
1. After a processor write cycle to the OCiHR reg-
2. If the OCiE bit is not set, the OCMPi pin is a
3. In both internal and external clock modes,
4. The output compare functions can be used both
5. The value in the 16-bit OC
Figure 49. Output Compare Block Diagram
76/187
16-bit
ister, the output compare function is inhibited
until the OCiLR register is also written.
general I/O port and the OLVLi bit will not
appear when a match is found but an interrupt
could be generated if the OCIE bit is set.
OCFi and OCMPi are set while the counter
value equals the OCiR register value (see
ure 50 on page 77
and
f
PWM mode.
for generating external events on the OCMPi
pins even if the input capture mode is also
used.
OLVi bit should be changed after each suc-
cessful comparison in order to control an output
waveform or establish a new elapsed timeout.
CPU
16 BIT FREE RUNNING
OC1R Register
OUTPUT COMPARE
16-bit
/4). This behavior is the same in OPM or
Figure 51 on page 77
CIRCUIT
OC2R Register
COUNTER
16-bit
for an example with f
for an example with
i
R register and the
OC1E
OCIE
OC2E
OCF1
CPU
Fig-
/2
FOLV2 FOLV1
Forced Compare Output capability
When the FOLVi bit is set by software, the OLVLi
bit is copied to the OCMPi pin. The OLVi bit has to
be toggled in order to toggle the OCMPi pin when
it is enabled (OCiE bit = 1). The OCFi bit is then
not set by hardware, and thus no interrupt request
is generated.
The FOLVLi bits have no effect in both One Pulse
mode and PWM mode.
(Control Register 2) CR2
(Control Register 1) CR1
OCF2
CC1
(Status Register) SR
OLVL2
CC0
0
0
OLVL1
0
Latch
Latch
1
2
OCMP2
OCMP1
Pin
Pin