ST20-C1 STMICROELECTRONICS [STMicroelectronics], ST20-C1 Datasheet - Page 16

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ST20-C1

Manufacturer Part Number
ST20-C1
Description
Instruction Set Reference Manual
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
3.1 Values
3
This chapter describes the general architectural features of the ST20-C1 core which
are relevant to more than one instruction or group of instructions. Interrupts and traps
are described in Chapter 6 and support for multi-tasking is described in Chapter 7.
Other features which are related to specific tasks are descr ibed in Chapter 4. A full list
of constants and data structures is given in Appendix A.
The ST20-C1 instruction set covers:
3.1
The ST20-C1 core supports data objects of different sizes, either signed or unsigned.
The sizes directly supported are bytes (8-bit), half words (16-bit), words (32-bit) and
multiple words (64-bit, 96-bit etc.). Bytes, half-words and words may be loaded and
stored. Arithmetic operations are provided for signed words and multiple words. A half
word is called a sixteen in the instruction names.
The most negative integer (0x80000000) is known as MostNeg and the most positive
(0x7FFFFFFF) as MostPos .
Boolean objects, taking one of the values true or false , are also used by some instruc-
tions. False is represented by the value 0 and true has the value 1. Section 4.7
describes how other values may be implemented for language compilation.
Several data structures are defined in this man ual. Each comprises a number of data
words (sometimes called slots ) that are referenced by name in the text and the
instruction descriptions and addressed as offsets from the base of the data structure.
A full list of these data structures and other constants is given in Appendix A.
3.1.1
The ST20 is little-endian - i.e. less significant data is always held in lower addresses.
This applies to bits in bytes, bytes in words and words in memory. Hence, in a word of
data representing an integer, one byte is more significant than another if its byte
selector is larger.
Figure 3.1 shows the ordering of bytes in words for the ST20.
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Architecture
control flow
arithmetic and logical operations
bit field manipulations
shifting and byte-swapping
register manipulations
memory access with various addressing modes and data sizes
task scheduling
direct input/output
Values
Ordering of information

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