ST20-C1 STMICROELECTRONICS [STMicroelectronics], ST20-C1 Datasheet - Page 189
ST20-C1
Manufacturer Part Number
ST20-C1
Description
Instruction Set Reference Manual
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST20-C1.pdf
(205 pages)
- Current page: 189 of 205
- Download datasheet (842Kb)
Exception vector table
Executing
External interrupt
Function
Function
Function code
Half-word
Half-word aligned
Idle
Inactive
Instruction
Instruction component
Instruction data value
Instruction pointer
Integer
The table mapping exception levels to user processes and exception descriptors .
A process is executing if the CPU is currently modifying its state . Only one process
can be executing at any one time.
An interrupt generated by a peripheral or external device, routed through the
interrupt controller and handled by an interrupt handler .
A named section of code which may have parameters and may return one or more
values.
A primary instruction.
The most significant 4-bits of an instruction component , which defines the action
of the component.
A 16-bit value or location.
An address is half-word aligned if it is divisible by two, i.e. if bit 0 is 0.
The CPU is idle when there is no process or exception handler executing .
A process is inactive if it is capable of being restarted but it is currently waiting for
some event to occur before it can continue. The event might be a semaphore
signal or a peripheral completing a DMA.
A code element corresponding to a single instruction set mnemonic, consisting of
zero or more prefixes followed by a non-prefix instruction component .
A single byte of code, consisting of a function code and 4 bits of data.
The operand of a primary instruction , which is built from the least significant 4 bits
of each of the instruction components of the instruction.
The 32-bit CPU register which holds the address of the next instruction to be
executed by the current process .
A whole number, which may be positive, negative or zero.
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