ml6692 Microsemi Corporation, ml6692 Datasheet - Page 10
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ml6692
Manufacturer Part Number
ml6692
Description
100base-tx Physical Layer With
Manufacturer
Microsemi Corporation
Datasheet
1.ML6692.pdf
(21 pages)
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ML6692
AC ELECTRICAL CHARACTERISTICS
MDC-MDIO (MII MANAGEMENT INTERFACE)
INITIALIZATION INTERFACE
Note 1. Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
Note 2. Measured using the test circuit shown in fig. 1, under the following conditions:
Note 3. Output current amplitude is I
Note 4. Measured relative to ideal negative and positive signal 50% points, using the four successive MLT-3 transitions for the 01010101 bit sequence.
Note 5. Time difference between 10% and 90% levels of the transition from the baseline voltage (nominally zero) to either the positive or negative peak signal
Note 6. Differential test load is shown in fig. 1 (see note 2).
Note 7. Defined as the percentage excursion of the differential signal transition beyond its final adjusted value during the symbol interval following the transition. The
Note 8. From first rising edge of TXCLK after TXEN goes high, to first bit of J at the MDI.
Note 9. From first bit of J at the MDI, to CRS.
Note 10. From first bit of J at the MDI, to first rising edge of RXCLK after RXDV goes high.
10
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
SPWH
t
SPWS
SPRH
CPER
CPW
PER1
PER2
SPRS
PW1
PW2
PW3
PW4
t
DV1
t
H1
S1
voltage. The times specified here correlate to the transition times defined in the ANSI X3T9.5 TP-PMD Rev 2.0 working draft, section 9.1.6, which include the
effects of the external network coupling transformer and EMI/RFI emissions filter.
adjusted value is obtained by doing a straight line best-fit to an output waveform containing 14 bit-times of no transition preceded by a transition from zero to
either a positive or negative signal peak; the adjusted value is the point at which the straight line fit meets the rising or falling signal edge.
R
All resistors are 1% tolerance.
LP
Write Setup Time, MDIO Data
Valid to MDC Rising Edge
1.4V Point
Write Hold Time, MDIO Data
Valid After MDC Rising Edge
1.4V Point
Read Setup Time, MDIO Data
Valid to MDC Rising Edge
1.4V Point
Read Hold time, MDIO Data
Valid After MDC Rising Edge
1.4V Point
Period of MDC
Pulsewidth of MDC
ECLK Positive Pulsewidth
ECLK Negative Pulsewidth
ECLK Period, EEPROM Mode
EDOUT Data Valid Time After
ECLK Rising Edge
ECLK period
ECLK Positive Pulsewidth
ECLK Negative Pulsewidth
ECLK Data Setup Time
ECLK Data Hold Time
= 200 , R
LS
= 49.9 , R
PARAMETER
OUT
TSET
= 40
= 2.49k .
1.25V/RTSET.
Positive or negative pulses
EDIN floating (EEPROM Mode)
EDIN floating (EEPROM Mode)
EDIN floating (EEPROM Mode)
EDIN floating (EEPROM Mode)
EDIN high (Microcontroller Mode)
EDIN high (Microcontroller Mode)
EDIN high (Microcontroller Mode)
EDIN high (Microcontroller Mode)
EDIN high (Microcontroller Mode)
CONDITIONS
1800
5000
2000
2000
MIN
400
100
160
900
900
10
10
10
10
0
TYP
MAX
900
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns