ST72521 STMICROELECTRONICS [STMicroelectronics], ST72521 Datasheet - Page 132
ST72521
Manufacturer Part Number
ST72521
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST72521.pdf
(211 pages)
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ST72521
CONTROLLER AREA NETWORK (Cont’d)
– ERROR. The error management as described in
Figure 70. CAN Error State Diagram
132/211
the CAN protocol is completely handled by hard-
ware using 2 error counters which get increment-
ed or decremented according to the error
condition. Both of them may be read by the appli-
When 128 * 11 recessive bits occur:
- the BOFF bit gets cleared
- the TECR register gets cleared
- the RECR register gets cleared
ERROR ACTIVE
When TECR or RECR > 127, the EPSV bit gets set
the EPSV bit gets cleared
When TECR and RECR < 128,
BUS OFF
cation to determine the stability of the network.
Moreover, as one of the node status bits (EPSV
or BOFF of the CSR register) changes, an inter-
rupt is generated if the SCIE bit is set in the ICR
Register. Refer to
ERROR PASSIVE
When TECR > 255 the BOFF bit gets set
and the EPSV bit gets cleared
Figure
70.
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