ST72T331 STMICROELECTRONICS [STMicroelectronics], ST72T331 Datasheet - Page 31

no-image

ST72T331

Manufacturer Part Number
ST72T331
Description
8-BIT MCU WITH 8 TO 16K OTP/EPROM, 256 EEPROM, 384 TO 512 BYTES RAM, ADC, WDG, SCI, SPI AND 2 TIMERS
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST72T331J25
Manufacturer:
ST
0
Part Number:
ST72T331J4SKIT
Manufacturer:
ST
0
Part Number:
ST72T331J4T3S
Manufacturer:
ST
0
Part Number:
ST72T331J4T6
Manufacturer:
ST
0
Part Number:
ST72T331J4T6S
Manufacturer:
ST
0
Part Number:
ST72T331N2
Manufacturer:
ST
Quantity:
20 000
I/O PORTS (Cont’d)
5.1.4 Register Description
5.1.4.1 Data registers
Port A Data Register (PADR)
Port B Data Register (PBDR)
Port C Data Register (PCDR)
Port D Data Register (PDDR)
Port E Data Register (PEDR)
Port F Data Register (PFDR)
Read /Write
Reset Value: 0000 0000 (00h)
Bit 7:0 = D7-D0 Data Register 8 bits.
The DR register has a specific behaviour accord-
ing to the selected input/output configuration. Writ-
ing the DR register is always taken in account
even if the pin is configured as an input. Reading
the DR register returns either the DR register latch
content (pin configured as output) or the digital val-
ue applied to the I/O pin (pin configured as input).
5.1.4.2 Data direction registers
Port A Data Direction Register (PADDR)
Port B Data Direction Register (PBDDR)
Port C Data Direction Register (PCDDR)
Port D Data Direction Register (PDDDR)
Port E Data Direction Register (PEDDR)
Port F Data Direction Register (PFDDR)
Read/Write
Reset Value: 0000 0000 (00h) (input mode)
Bit 7:0 = DD7-DD0 Data Direction Register 8 bits.
The DDR register gives the input/output direction
configuration of the pins. Each bits is set and
cleared by software.
0: Input mode
1: Output mode
DD7
D7
7
7
DD6
D6
DD5
D5
DD4
D4
DD3
D3
DD2
D2
DD1
D1
DD0
D0
0
0
5.1.4.3 Option registers
Port A Option Register (PAOR)
Port B Option Register (PBOR)
Port C Option Register (PBOR)
Port D Option Register (PBOR)
Port E Option Register (PBOR)
Port F Option Register (PFOR)
Read/Write
Reset Value: see Register Memory Map
Bit 7:0 = O7-O0 Option Register 8 bits.
The OR register allow to distinguish in input mode
if the interrupt capability or the floating configura-
tion is selected.
In output mode it select push-pull or open-drain
capability.
Each bit is set and cleared by software.
Input mode:
0: floating input
1: input pull-up with interrupt
Output mode:
0: open-drain configuration
1: push-pull configuration
O7
7
O6
O5
O4
ST72E331 ST72T331
O3
O2
O1
Table 4
31/107
O0
0
31

Related parts for ST72T331