hd66789 Renesas Electronics Corporation., hd66789 Datasheet - Page 34

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hd66789

Manufacturer Part Number
hd66789
Description
528-channel, One-chip Driver For Amorphous Tft Panels With 262,144-color Display Ram, Power Supply Circuit, And Gate Circuit
Manufacturer
Renesas Electronics Corporation.
Datasheet
HD66789
HWM: When HWM=1, data are written to GRAM in high speed. In high-speed write mode, 4 words are
written to GRAM in a single operation after executing 4 RAM write operations. If RAM write is
terminated before it is executed 4 times, the last data will not be written. Make sure that RAM write is
executed 4 times. For this reason, the lower 2 bits must be set to “0” when setting the RAM address. For
details, see “High-Speed RAM Write Mode” section.
I/D1-0: The address counter is automatically incremented by 1, after data are written to GRAM when I/D1-
0 = “1”. The address counter is automatically decremented by 1, after data are written to GRAM when
I/D1-0 = “0”. An independent setting for the increment or decrement of the address counter can be made to
the upper (AD15-8) and the lower (AD7-0) bits of the address. The address transition direction when data
are written to GRAM is set with AM bits.
AM: Set the direction of updating address counter automatically after data are written to GRAM. When
AM = “0”, the address counter is updated in the horizontal direction. When AM = “1”, the address counter
is updated in the vertical direction. When the window address is specified, data are written to the GRAM
area specified by the window address in the manner specified with I/D1-0, AM bits.
Rev.0.12, May 09 2003, page 34 of 156
TRI
0
1
0
1
1
DFM1 DFM0
*
0
1
1
0
0
*
*
0
1
DB17 DB16 DB15 DB14 DB13 DB12
DB17 DB16 DB15 DB14 DB13 DB12
DB17 DB16 DB15 DB14 DB13 DB12
R5
R5
R5
R4
R4
R4
First transmission
First transmission
R3
R3
R3
First transmission
R2
R2
R2
8-bit interface data format
R1
R1
R1
8-bit interface data format
R0
R0
R0
DB17 DB16 DB15 DB14 DB13 DB12
DB17 DB16 DB15 DB14 DB13 DB12
DB11 DB10
G5
G5
G5
G4
G4
G4
Setting disabled
Setting disabled
Second transmission
Second transmission
G3
G3
G3
DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10
G2
G2
G2
G1
G1
G1
G0
G0
G0
Second transmission
DB17 DB16 DB15 DB14 DB13 DB12
DB17 DB16 DB15 DB14 DB13 DB12
B5
B5
B5
B4
B4
B4
Third transmission
Third transmission
B3
B3
B3
B2
B2
B2
Preliminary
B1
B1
B1
B0
B0
B0

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