mx25l6405 Macronix International Co., mx25l6405 Datasheet - Page 6

• Manufacturer Part Number: mx25l6405
• Description: Tm 64m-bit [x 1] Cmos Serial Eliteflash Memory
• Manufacturer: Macronix International Co.

Figure 2. ACCELERATED PROGRAM TIMING DIAGRAM
The Serial Data Output (SO) is high impedance, both Serial Data Input (SI) and Serial Clock (SCLK) are don't care during
the HOLD operation. If Chip Select (CS#) drives high during HOLD operation, it will reset the internal logic of the device.
To re-start communication with chip, the HOLD# must be at high and CS# must be at low.
PROGRAM/ERASE ACCELERATION
To activate the program/erase acceleration function requires ACC pin connecting to 12V voltage (see Figure 2), and then
to be followed by the normal program/erase process. By utilizing the program/erase acceleration operation, the
performances are improved as shown on table of "ERASE AND PROGRAM PERFORMACE".
P/N: PM1107
HOLD FEATURE
HOLD# pin signal goes low to hold any serial communications with the device. The HOLD feature will not stop the operation
of write status register, programming, or erasing in progress.
The operation of HOLD requires Chip Select(CS#) keeping low and starts on falling edge of HOLD# pin signal while Serial
Clock (SCLK) signal is being low (if Serial Clock signal is not being low, HOLD operation will not start until Serial Clock
signal being low). The HOLD condition ends on the rising edge of HOLD# pin signal while Serial Clock(SCLK) signal is
being low( if Serial Clock signal is not being low, HOLD operation will not end until Serial Clock being low), see Figure 1.
Figure 1. Hold Condition Operation
Note: tVHH (VHH Rise and Fall Time) min. 250ns
12V
ACC
CS#
HOLD#
SCLK
V
V
IL
HH
or V
IH
t
VHH
(standard)
Condition
Hold
6
(non-standard)
Condition
Hold
MX25L6405
t
VHH
V
IL
or V
REV.1.3, NOV. 06, 2006
IH