mx25l512 Macronix International Co., mx25l512 Datasheet - Page 2

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mx25l512

Manufacturer Part Number
mx25l512
Description
512k-bit [x 1] Cmos Serial Flash
Manufacturer
Macronix International Co.
Datasheet

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• SI Input
• SO Output
• WP# pin
• HOLD# pin
• PACKAGE
GENERAL DESCRIPTION
The MX25L512 is a CMOS 524,288 bit serial Flash memory, which is configured as 65,536 x 8 internally. The MX25L512
feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals
are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by
CS# input.
The MX25L512 provide sequential read operation on whole chip.
After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified
page or sector/block locations will be executed. Program command is executed on page (256 bytes) basis, and erase
command is executes on chip or sector (4K-bytes).
To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read
command can be issued to detect completion status of a program or erase operation via WIP bit.
When the device is not in operation and CS# is high, it is put in standby mode and draws less than 10uA DC current.
The MX25L512 utilize MXIC's proprietary memory cell, which reliably stores memory contents even after 100,000 program
and erase cycles.
P/N: PM1214
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- All Pb-free devices are RoHS Compliant
Serial Data Input
Serial Data Output
Hardware write protection
8-pin SOP (150mil)
pause the chip without diselecting the chip
2
MX25L512
REV. 1.4, MAR. 24, 2008

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