SC9S12XS256J1MAA FREESCALE [Freescale Semiconductor, Inc], SC9S12XS256J1MAA Datasheet - Page 482
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SC9S12XS256J1MAA
Manufacturer Part Number
SC9S12XS256J1MAA
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.SC9S12XS256J1MAA.pdf
(736 pages)
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Timer Module (TIM16B8CV2) Block Description
16.4.1
The prescaler divides the bus clock by 1,2,4,8,16,32,64 or 128. The prescaler select bits, PR[2:0], select
the prescaler divisor. PR[2:0] are in timer system control register 2 (TSCR2).
482
PACLK/65536
PACLK/256
Bus Clock
PAOVF
INTERRUPT
Prescaler
REQUEST
PR[2:1:0]
16-BIT COMPARATOR
16-BIT COMPARATOR
16-BIT COMPARATOR
EDG0A
EDG1A
PAOVF
TCNT(hi):TCNT(lo)
PRESCALER
16-BIT COUNTER
PAOVI
CHANNEL2
CHANNEL 1
CHANNEL7
CHANNEL 0
PACNT(hi):PACNT(lo)
TC0
TC1
TC7
16-BIT COUNTER
EDG7A
EDG7B
EDG0B
EDG1B
INTERRUPT
PAOVI
LOGIC
PACLK/65536
PAOVF
PACLK/256
Figure 16-30. Detailed Timer Block Diagram
S12XS Family Reference Manual, Rev. 1.09
PACLK
CLEAR COUNTER
DETECT
DETECT
TE
DETECT
EDGE
EDGE
EDGE
C0F
C1F
C7F
PAIF
PAI
PACLK
MUX
OM:OL1
OM:OL0
TOV1
OM:OL7
TOV0
TOV7
CLK[1:0]
DIVIDE-BY-64
TOF
TOI
PAMOD
PEDGE
IOC0
CxF
CxI
C0F
C1F
PAE
IOC1
C7F
IOC7
INTERRUPT
LOGIC
IOC0 PIN
IOC1 PIN
IOC7 PIN
LOGIC
LOGIC
LOGIC
DETECT
EDGE
PAIF
channel 7 output
compare
TCRE
CH. 1 COMPARE
CH. 0 CAPTURE
CH. 1 CAPTURE
CH. 0COMPARE
CH. 7 COMPARE
CH.7 CAPTURE
PA INPUT
Freescale Semiconductor
Bus Clock
IOC0 PIN
IOC1 PIN
IOC7 PIN
TOF
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