zl10036 Zarlink Semiconductor, zl10036 Datasheet - Page 35

• Manufacturer Part Number: zl10036
• Description: Digital Satellite Tuner With Rf Bypass
• Manufacturer: Zarlink Semiconductor

LO SSB phase noise
LO integrated phase jitter
LOTEST output amplitude
Bandwidth
Bandwidth absolute tolerance
Channel bandwidth match
Characteristic response
Channel gain match
Channel phase match
Output total harmonic distortion
Output limiting
Crystal frequency
External reference input
frequency
External reference drive level
Phase detector comparison
frequency
Equivalent phase noise at
phase detector
LO division ratio
Maximum SCL clock rate
1. All power levels are referred to 75 Ω and assume an ideal impedance match: 0 dBm = 109 dBmV. System specifications refer to
total cascaded system of converter/AGC stage and baseband amplifier/filter stage with maximum terminating load as specified in “DC
Characteristics” on page 32, with output amplitude of 0.5 Vp-p differential.
2. See Figure 8, RF gain adjust = +4 dB, prefilter = +4.2 dB and postfilter = 0 dB, RFG = 1, BA1 = 0, BA0 = 1, BG1 = 0, BG0 = 0
Characteristic
(specifications apply with both single-ended and differential load unless otherwise stated)
240
100
Min.
31.25
-5
-1
4
1.0
4
4
0.2
-148
Typ.
200
Zarlink Semiconductor Inc.
Baseband Filters
Synthesizer
ZL10036
2000
32767
-132
-110
Max.
-76
-96
-26
40
+5
+1
20
20
35
3
0.5 Vp-p
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
deg
mVp-p
MHz
%
%
dBc
Vp-p
MHz
MHz
kHz
dBc/Hz SSB, within loop bandwidth. Phase
kHz
Units
@ 10 kHz offset
@ 100 kHz offset
@ 1 MHz offset
Noise floor.
See Figure 11 on page 18 and
Test output enabled into 50 Ω
See 2.4, “Baseband Filter“ on page 17.
Maximum load as specified
Filter bandwidth setting, fset, 8-35 MHz.
Slave oscillator enabled, see
Filter bandwidth settings 8-35 MHz
All bandwidth settings, see Figure 10 on
page 17.
Included in system gain match
At 0.8 V p-p, single-ended. Maximum
load as specified
Level at hard clipping, single-ended.
Maximum load as specified
See Table 14 on page 30.
Sinewave coupled through 10nF blocking
capacitor to pin XTAL. XTALCAP is left
open.
detector comparison frequency = 1 MHz
14
Conditions
Measured either, at
baseband output of
10 MHz, PLL loop
bandwidth circa
100 Hz, or at
LOTEST output.
Vvar > 3 V
Measured at
LOTEST output.
16
Data Sheet
15