zl10036 Zarlink Semiconductor, zl10036 Datasheet - Page 8
zl10036
Manufacturer Part Number
zl10036
Description
Digital Satellite Tuner With Rf Bypass
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL10036.pdf
(38 pages)
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Pin Description
Pin
10
11
12
13
1
2
3
4
5
6
7
8
9
QDC
QDC
QOUT
QOUT
VccBB
VccBB
IOUT
IOUT
IDC
IDC
SLEEP
SCL
SDA
Symbol
Direction
Out
Out
Out
Out
Out
NA
NA
NA
NA
In
In
Q Channel DC offset correction
capacitor. Configuration and value as per
application diagram (see Figure 2)
Q Channel baseband differential outputs.
AC couple outputs as per applications
diagram (see Figure 2)
+5 V voltage supply for Baseband
+5 V voltage supply for Baseband
I Channel baseband differential outputs
AC couple outputs as per applications
diagram (Figure 2)
I Channel DC offset correction capacitor.
Configuration and value as per
application diagram (Figure 2)
Hardware power down input.
Logic ‘0’ – normal mode.
Logic ‘1’ - analogue sections are
powered down.
This function is OR’ed with the PD
control function, see section 3.1.2
I²C serial clock input
I²C serial data input/output
Zarlink Semiconductor Inc.
ZL10036
Function
8
Same configuration as pins 3 &
4
Same configuration as pins 1 &
2
Internal
Internal
Internal
Baseband
Baseband
Baseband
Signal
Signal
Signal
SDA/SCL
SDA/SCL
Input
Input
SDA
SDA
only
only
CMOS Digital Input
CMOS Digital Input
VccBB
VccBB
SLEEP
SLEEP
Schematics
10µA
10µA
500k
500k
500k
500k
Data Sheet
DIGDEC
DIGDEC
1.2 mA
1.2 mA
Output
Output
DC
DC
DC
Correction
Correction
Correction
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