ch7019 Chrontel, ch7019 Datasheet - Page 11

• Manufacturer Part Number: ch7019
• Description: Ch7019 Tv Encoder / Lvds Transmitter
• Manufacturer: Chrontel

CHRONTEL
When IDFx = 4 (YCrCb mode), the data inputs can also be used to transmit sync information to the device. In this
mode, the embedded sync will follow the VIP2 convention, and the first byte of the ‘video timing reference code’ will be
assumed to occur when a Cb sample would occur, if the video stream was continuous. This is shown below:
201-0000-048
Table 3: Multiplexed Input Data Formats (IDFx = 0, 1)
Table 4: Multiplexed Input Data Formats (IDFx = 2, 3)
Table 5: Multiplexed Input Data Formats (IDFx = 4)
IDFx =
Format
=
Pixel #
Bus
Data
IDFx =
Format =
Pixel #
Bus Data
IDFx =
Format =
Pixel #
Bus Data
Dx[11]
Dx[10]
Dx[9]
Dx[8]
Dx[7]
Dx[6]
Dx[5]
Dx[4]
Dx[11]
Dx[10]
Dx[9]
Dx[8]
Dx[7]
Dx[6]
Dx[5]
Dx[4]
Dx[3]
Dx[2]
Dx[1]
Dx[0]
Dx[7]
Dx[6]
Dx[5]
Dx[4]
Dx[3]
Dx[2]
Dx[1]
Dx[0]
Rev. 2.4,
P0a
G0[3]
G0[2]
G0[1]
G0[0]
B0[7]
B0[6]
B0[5]
B0[4]
B0[3]
B0[2]
B0[1]
B0[0]
P0a
Cb0[7]
Cb0[6]
Cb0[5]
Cb0[4]
Cb0[3]
Cb0[2]
Cb0[1]
Cb0[0]
P0a
G0[4]
G0[3]
G0[2]
B0[7]
B0[6]
B0[5]
B0[4]
B0[3]
12/18/2006
For TV/Bypass RGB or/and LVDS
for TV/Bypass RGB or/and LVDS
RGB 8-8-8 (2x12-bit)
RGB 5-6-5 (2x8bit)
P0b
R0[7]
R0[6]
R0[5]
R0[4]
R0[3]
R0[2]
R0[1]
R0[0]
G0[7]
G0[6]
G0[5]
G0[4]
P0b
R0[7]
R0[6]
R0[5]
R0[4]
R0[3]
G0[7]
G0[6]
G0[5]
P0b
Y0[7]
Y0[6]
Y0[5]
Y0[4]
Y0[3]
Y0[2]
Y0[1]
Y0[0]
2
0
P1a
G1[4]
G1[3]
G1[2]
B1[7]
B1[6]
B1[5]
B1[4]
B1[3]
P1a
G1[3]
G1[2]
G1[1]
G1[0]
B1[7]
B1[6]
B1[5]
B1[4]
B1[3]
B1[2]
B1[1]
B1[0]
Cr0[7]
P1a
Cr0[6]
Cr0[5]
Cr0[4]
Cr0[3]
Cr0[2]
Cr0[1]
Cr0[0]
YCrCb 4:2:2 (2x8-bit)
P1b
R1[7]
R1[6]
R1[5]
R1[4]
R1[3]
G1[7]
G1[6]
G1[5]
P1b
R1[7]
R1[6]
R1[5]
R1[4]
R1[3]
R1[2]
R1[1]
R1[0]
G1[7]
G1[6]
G1[5]
G1[4]
P1b
Y1[7]
Y1[6]
Y1[5]
Y1[4]
Y1[3]
Y1[2]
Y1[1]
Y1[0]
for TV
4
P0a
G0[5]
G0[4]
G0[3]
B0[7]
B0[6]
B0[5]
B0[4]
B0[3]
P0a
G0[4]
G0[3]
G0[2]
B0[7]
B0[6]
B0[5]
B0[4]
B0[3]
G0[0]
B0[2]
B0[1]
B0[0]
P2a
Cb2[7]
Cb2[6]
Cb2[5]
Cb2[4]
Cb2[3]
Cb2[2]
Cb2[1]
Cb2[0]
for TV/Bypass RGB or/and LVDS
For TV/Bypass RGB or/and LVDS
or RGB 5-6-5 (2x8-bit)
RGB 5-5-5 (2x8-bit)
RGB 8-8-8 (2x12-bit)
P0b
R0[7]
R0[6]
R0[5]
R0[4]
R0[3]
G0[7]
G0[6]
G0[5]
R0[2]
R0[1]
R0[0]
G0[1]
X
R0[7]
R0[6]
R0[5]
R0[4]
R0[3]
G0[7]
G0[6]
P2b
Y2[7]
Y2[6]
Y2[5]
Y2[4]
Y2[3]
Y2[2]
Y2[1]
Y2[0]
P0b
3
1
G1[5]
G1[4]
G1[3]
B1[7]
B1[6]
B1[5]
B1[4]
B1[3]
P1a
P1a
G1[4]
G1[3]
G1[2]
B1[7]
B1[6]
B1[5]
B1[4]
B1[3]
G1[0]
B1[2]
B1[1]
B1[0]
P3a
Cr2[7]
Cr2[6]
Cr2[5]
Cr2[4]
Cr2[3]
Cr2[2]
Cr2[1]
Cr2[0]
CH7019B
P1b
X
R1[7]
R1[6]
R1[5]
R1[4]
R1[3]
G1[7]
G1[6]
Y3[7]
Y3[6]
Y3[5]
Y3[4]
Y3[3]
Y3[2]
Y3[1]
Y3[0]
P1b
R1[7]
R1[6]
R1[5]
R1[4]
R1[3]
G1[7]
G1[6]
G1[5]
R1[2]
R1[1]
R1[0]
G1[1]
P3b
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