kac-9617 ETC-unknow, kac-9617 Datasheet
kac-9617
Related parts for kac-9617
kac-9617 Summary of contents
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... IMAGE SENSOR SOLUTIONS DEVICE PERFORMANCE SPECIFICATION KODAK KAC-9617 CMOS IMAGE SENSOR 648 (H) X 488 (V) High Dynamic Range 30 fps Monochrome CIS February 2006 Revision 1.5 www.kodak.com/go/imagers 585-722-4385 1 Email:imagers@kodak.com ...
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... IMAGE SENSOR SOLUTIONS KAC-9617 Monochrome High Dynamic Range CMOS Image Sensor VGA 30 FPS General Description The KAC-9617 is a high performance, low power, 1/3” VGA CMOS Active Pixel Sensor capable of capturing grey-scale digi- tal still or motion images and converting them to a digital data stream. ...
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... RSVD 18 Ordering Information KAC-9617 A small PCB that houses the KAC-9617 sensor together with all necessary discrete components. www.kodak.com/go/imagers 585-722-4385 R 12 Bit A/D G AMP MUX B Horizontal Gain Timing Control Register Bank Power Control snapshot pdwn Figure 1. Chip Block Diagram ...
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... Scan Read Out Direction (0,0) lens Figure 3. Scan directions and position of origin in imaging system www.kodak.com/go/imagers 585-722-4385 Camera Control Serial Control Bus KAC-9617 Digital Video Bus Figure 2. Typical Application Diagram pin 1 (0,0) digital out (0,0) horizontal scan ...
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IMAGE SENSOR SOLUTIONS Pin Descriptions Pin Name I/O Typ Description 1 vsrvdd 0 P Charge pump output, connect to ground via a1.0µf capacitor. 2 vrl I A Anti blooming pin. This pin is normally tied to ground. 3 vdd_pix I ...
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IMAGE SENSOR SOLUTIONS Pin Descriptions (Continued) Pin Name I/O Typ Description Digital output. Bit the digital video output bus. This output can be put into tri state mode. Digital output. Bit 6 ...
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IMAGE SENSOR SOLUTIONS Absolute Maximum Ratings (Notes 1 & 2) Any Positive Supply Voltage Voltage On Any Input or Output Pin -0.5V to 6.5V Input Current at any pin (Note 3) ESD Susceptibility (Note 5) Human Body Model Machine Model ...
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IMAGE SENSOR SOLUTIONS Video Amplifier Specifications The following specifications apply for all VDD pins= +3.3V. Boldface limits apply for Symbol Parameter V Video Amplifier Nominal Gain gain C Color Amplifiers Nominal Gain gain AC Electrical Characteristics The ...
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... Due to random process deviations, not all pixels in an image sensor array will react in the same way to a given light condition. These variations are known as blemishes. Kodak tests the KAC-9617 CMOS image sensor under both dark and illuminated conditions. These two tests are referred to as “Dark Tests” and “Standard Light Tests” respectively. ...
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IMAGE SENSOR SOLUTIONS Sensor Response Curves 700 600 500 400 300 200 100 0 400 500 100 notes: 1) The dark signal and DSNU both increase linearly with integration time. The results in the graph were ...
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... IMAGE SENSOR SOLUTIONS Functional Description 1.0 OVERVIEW 1.1 Light Capture and Conversion The KAC-9617 contains a CMOS active pixel array consisting of 488 rows by 648 columns. This active region is surrounded by 8 columns and 8 rows of optically shielded (black) pixels as shown in Figure. 8 columns, 8 rows 640 columns, 480 rows ...
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IMAGE SENSOR SOLUTIONS Functional Description (continued) 2.0 WINDOWING The integrated timing and control circuit allows any size window in any position within the active region of the array to be read out with a 1x1 pixel resolution. The window read ...
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IMAGE SENSOR SOLUTIONS Functional Description (continued) 3.0 READ OUT MODES 3.1 Progressive Scan Readout Mode In progressive scan readout mode, every pixel in every row in the display window is consecutively read out, one pixel at a time, starting with ...
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IMAGE SENSOR SOLUTIONS Functional Description (continued) 4.0 SUB-SAMPLING MODES 4.1 2:1 Sub-Sampling The timing and control circuit can be programmed to sub-sam- ple pixels in the display window vertically, horizontally or both, with an aspect ratio of 2:1 as illustrated ...
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IMAGE SENSOR SOLUTIONS Functional Description (continued) 5.0 FRAME RATE & EXPOSURE CONTROL 5.1 Introduction A frame is defined as the time it takes to reset every pixel in the array, integrate the incident light, convert it to digital data and ...
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... IMAGE SENSOR SOLUTIONS Functional Description (continued) 5.3 Clock Generation The KAC-9617 contains a clock generation module (figure 19) that will create three clocks as follows: Hclk, the horizontal clock. This is an internal system clock and can be programmed to be the input clock (mclk) or mclk divided by any number between 1 and 31 ...
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... The timing and control circuit built into the KAC-9617 allows the linear response of the electro-optic response to be modified into a piece-wise linear response (approximate gamma) ...
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... Illumination (Lux) Figure 22. Break Points Programming The maximum illumination level (see figure 22) that can be detected by the sensor is determined by the settings of the level and slope registers. For a full explanation of how to use the KAC-9617 in piecewise linear mode refer to LM9618/28 Application note 2. rdelayl fdelayh fdelayl ...
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... Figure 23. Timing Diagram in the SNAP State 6.0 SNAPSHOT MODE 6.1 Introduction Two dedicated pins are provided on the KAC-9617, snapshot, and extsync allowing the sensor to be externally controlled to capture a single image. The snapshot input pin is used to trigger a snapshot, while the extsync output pin is used to synchronize a light source, strobe or mechanical shutter ...
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... The KAC-9617 has a built-in bad pixel detection and correction block that operates on the fly. This block can be switched off by the user. 7.2 Black Level Compensation In addition to the programmable gain the KAC-9617 has a built in black level compensation block as illustrated in Figure 26. This block can be switched off. Limit to 0-127 Black Level Estimation ...
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... The value for sadr is set at power up. 10.3 Acknowledgment The KAC-9617 will hold the value of the sda pin to a logic 0 dur- ing the logic 1 state of the Acknowledge clock pulse on sclk as shown in Figure 30. sda ...
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... KAC-9617 Connected bit Digital Image Processors Figure 36. Example of connection to 10/8 bit systems Synchronisation Signals in Master Mode By default the sensor’s digital video port’s synchronisation sig- nals are configured to operate in master mode. In master mode the integrated timing and control block controls the flow of data ...
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IMAGE SENSOR SOLUTIONS Functional Description (continued) , pclk d[11:0] a) pclk active edge negative pclk d[11:0] b) pclk active edge positive invalid pixel data Figure 38. pclk in Data Ready Mode By default the pixel clock is a free running ...
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IMAGE SENSOR SOLUTIONS Functional Description (continued) pclk vsync hsync d[11:0] row1 frame 1 Programmable hsync to 1st valid pixel delay ...
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... Only two synchronization signals are used in slave mode as fol- lows: hsync is the row trigger input signal. vsync is the frame trigger input signal. Figure 48 shows the KAC-9617’s digital video port in slave mode connected to a digital video processor master DVP. d[11:0] din[11:0] hsync RowTrig ...
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IMAGE SENSOR SOLUTIONS MEMORY MAP ADDR Register Reset Value 00h UPDATE 00h 01h REV Latest Silicon 02h MCFG0 00h 03h MCFG1 00h 04h PCR 00h 05h VCLKGEN 04h 06h VMODE0 00h 07h VMODE1 00h 08h VMODE2 00h 09h SNAPMODE 00h ...
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IMAGE SENSOR SOLUTIONS MEMORY MAP (continued) ADDR Register Reset Value 23h 00h 24h 25h BP2LEV 00h 26h BLCOEFF 00h 27h BPTH0H 00h 28h BPTH0L 00h 29h BPTH1H 00h 2Ah BPTH1L 00h 2Bh OCR 00h 3Bh 7Fh Note a: Programmed setting ...
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... IMAGE SENSOR SOLUTIONS Register Set (continued) The following section describes all available registers in the KAC-9617 register bank and their function. Register Name Settings Update Register Mnemonic UPDATE Address 00 Hex Type Read/Write Reset Value 00 Hex. Bit Bit Symbol Description 7:1 Reserved 0 UpdateSettings Set to inform the integrated ...
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IMAGE SENSOR SOLUTIONS Register Set (continued) Register Name Main Configuration 1 Address 03 Hex Mnemonic MCFG1 Type Read/Write Reset Value 00 Hex Bit Bit Symbol Description 7 ColorMode Set when using a monochrome sensor. When this bit ...
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IMAGE SENSOR SOLUTIONS Register Set (continued) Register Name Digital Video Mode 0 Address 06 Hex Mnemonic VMODE0 Type Read/Write Reset Value 00 Hex Bit Bit Symbol Description 7:6 PixDataSel Use to program the number of active bits on the digital ...
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IMAGE SENSOR SOLUTIONS Register Set (continued) Register Name Digital Video Mode 2 Address 08 Hex Mnemonic VMODE2 Type Read/Write Reset Value 00 Hex Bit Bit Symbol Description 7:4 HsyncAdjust Use to program the leading edge of hsync to the first ...
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IMAGE SENSOR SOLUTIONS Register Set (continued) Register Name Display Window Column Start Register Address 10 Hex Mnemonic DCOLS Type Read/Write Reset Value 00 Hex Bit Bit Symbol Description 7:0 DwStartCol Use to program the display win- dow’s start column MSBs. ...
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IMAGE SENSOR SOLUTIONS Register Set (continued) Register Name Frame Delay Low Register Address 18 Hex Mnemonic FDELAYL Type Read/Write Reset Value 00 Hex Bit Bit Symbol Description 7:0 FDelay [7:0] Use to program the LSBs of the frame delay. Register ...
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IMAGE SENSOR SOLUTIONS Register Set (continued) Register Name Break Point 2 Slope Low Register Address 21 Hex Mnemonic BP2SLOPEL Type Read/Write Reset Value 00 Hex Bit Bit Symbol Description 7:0 Bp2Slope[7:0] This register allows the slope of the curve to ...
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IMAGE SENSOR SOLUTIONS Register Set (continued) Register Name Bad Pixel Threshold 1 Low Register Address 2A Hex Mnemonic BPTH1L Type Read/Write Reset Value 00 Hex Bit Bit Symbol Description 7:4 THR1 [3.0] Use to program the MSBs of the bad ...
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IMAGE SENSOR SOLUTIONS Timing Information 1.0 DIGITAL VIDEO PORT MASTER MODE TIMING pclk hsync t1 d[11:0] pclk vsync t5 hsync pclk vsync t5 hsync Inter Frame Delay Figure 53. Frame Delay Timing (With Inter Frame Delay). Label Descriptions t0 pclk ...
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IMAGE SENSOR SOLUTIONS Timing Information (continued) 2.0 DIGITAL VIDEO PORT SLAVE MODE TIMING hsync trigger row n t2 d[11:0] P652 P654 P653 mclk Row n-1 Figure 54. Slave Mode Row Trigger and Readout Timing hsync trigger last row in frame ...
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IMAGE SENSOR SOLUTIONS Timing Information (continued) 3.0 DIGITAL VIDEO PORT SINGLE FRAME CAPTURE (SNAPSHOT MODE) TIMING t1 snapshot extsync Figure 57. Snapshot Mode Timing With External Shutter t1 snapshot extsync Figure 58. Snapshot Timing Without External Shutter Label Descriptions t1 ...
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IMAGE SENSOR SOLUTIONS Timing Information (continued) 4.0 SERIAL BUS TIMING Sr t fDA t fDA SDA t HD;DAT t t SU;STA HD;STA SCLK t rCL = Rp resistor pull-up = MCS current source pull-up (1) Rising edge of the first ...
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IMAGE SENSOR SOLUTIONS Mechanical Information Dimension Description * A Distance from top of die to bottom of cavity B Top of die to top of glass lid C Top of die to bottom of glass lid ...
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IMAGE SENSOR SOLUTIONS Package Information * * For optical center information see Mechanical Information Section on Page 39 * ...