em6521 EM Microelectronic, em6521 Datasheet - Page 42

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em6521

Manufacturer Part Number
em6521
Description
Mfp Version Of Em6621 Ultra Low Power Microcontroller With 4x20 Lcd Driver
Manufacturer
EM Microelectronic
Datasheet
10 Interrupt Controller
The EM6521 has 12 different interrupt request sources, each of which is maskable. Five of them come from
external sources and seven from internal sources.
External(4)
Internal(8)
To be able to send an interrupt to the CPU, at least one of the interrupt request flags must ‘1’ ( IRQxx ) and the
general interrupt enable bit IntEn located in the register RegSysCntl1 must be set to 1. The interrupt request
flags can only be set high by a positive edge on the IRQxx data flip-flop while the corresponding mask register
bit ( MaskIRQxx ) is set to 1.
At power on or after any reset all interrupt request mask registers are cleared and therefore do not allow any
interrupt request to be stored. Also the general interrupt enable IntEn is set to 0 (No IRQ to CPU) by reset.
After each read operation on the interrupt request registers RegIRQ1 , RegIRQ2 or RegIRQ3 the contents of
the addressed register are reset. Therefore one has to make a copy of the interrupt request register if there
was more than one interrupt to treat. Each interrupt request flag may also be reset individually by writing 1 into
it .
Interrupt handling priority must be resolved through software by deciding which register and which flag inside
the register need to be serviced first.
Since the CPU has only one interrupt subroutine and the IRQxx registers are cleared after reading, the CPU
does not miss any interrupt request which comes during the interrupt service routine. If any occurs during this
time a new interrupt will be generated as soon as the software comes out of the current interrupt subroutine.
Copyright © 2005, EM Microelectronic-Marin SA
Figure 31. Interrupt Controller Block Diagram
DB[n]
Write
IRQxx
Read
ClrIntBit
Reset
R
One of these Blocks for each IRQ
Mask
- Port A,
- Serial Interface
- Prescaler
- Melody timer
- Serial Interface
- Millisecond-Counter
- 10-bit Counter
Interrupt Request
Capture Register
PA[3] .. PA[0] inputs
Ck[1], Blink, 32Hz/8Hz
1/10Sec or 1Sec
Count0, CountComp
42
DB
Write
12 Input-OR
General
INT En
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EM6521
IRQ to µP

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