em6521 EM Microelectronic, em6521 Datasheet - Page 7

• Manufacturer Part Number: em6521
• Description: Mfp Version Of Em6621 Ultra Low Power Microcontroller With 4x20 Lcd Driver
• Manufacturer: EM Microelectronic

2
The EM6521 has two low power dissipation modes, standby and sleep.
these modes.
2.1 Active Mode
The active mode is the actual CPU running mode. Instructions are read from the internal ROM and executed by
the CPU. Leaving active mode via the halt instruction to go into standby mode, the Sleep bit write to go into
Sleep mode or a reset from port A to go into reset mode.
2.2 Standby Mode
Executing a halt instruction puts the EM6521
into standby mode. The voltage regulator,
oscillator, watchdog timer, LCD, interrupts,
timers and counters are operating. However,
the CPU stops since the clock related to
instruction execution stops. Registers, RAM
and I/O pins retain their states prior to
standby mode. Standby is canceled by a
reset or an interrupt request if enabled.
2.3 Sleep Mode
Writing to the Sleep bit in the RegSysCntl1
register puts the EM6521 in sleep mode.
The oscillator stops and most functions of
the EM6521 are inactive. To be able to write
to the Sleep bit, the SleepEn bit in
RegSysCntl2 must first be set to "1". In
sleep mode only the voltage regulator and
the reset input are active. The RAM data
integrity is maintained. Sleep mode may be canceled only by a high level of min 10µs at the EM6521 Reset
terminal or by the selected port A input reset combination, if option InpResSleep is turned on.
Due to the cold-start characteristics of the oscillator, waking up from sleep mode may take some time to
guarantee stable oscillation. During sleep mode and the following start up the EM6521 is in reset state. Waking
up from sleep clears the Sleep flag but not the SleepEn bit. Inspecting the SleepEn allows to determine if the
EM6521 was powered up (SleepEn = "0") or woken up from sleep (SleepEn = "1").
Table 2.3.1. Internal State in Standby and Sleep Mode
Copyright © 2005, EM Microelectronic-Marin SA
Operating Modes
I/O Port B and Serial Port
Voltage Level Detector
Instruction Execution
Oscillator Watchdog
Registers and Flags
Interrupt Functions
Option Registers
Timer & Counter
Logic Watchdog
Buzzer Output
Strobe Output
Input Port A
RAM Data
Reset Pin
Oscillator
R
Function
LCD
Finishes ongoing measure, then stop
Retained
Retained
Retained
Standby
Stopped
Active
Active
Active
Active
Active
Active
Active
Active
Active
Active
Active
Figure 4 Mode transition diagram
Standby
7
instruction
Halt
Reset=1
IRQ
Reset=1
1 0 8 H
No pull resistors and inputs deactivated
Figure 4 is a transition diagram for
Pull’s as defined in option register
Active
Reset
except if InpResSleep = "1"
Reset=0
Stopped (display off)
High Impedance,
High Impedance
Retained
Retained
Stopped
Stopped
Stopped
Stopped
Stopped
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Active
Active
Reset
Reset
Reset
Sleep
Reset=1
EM6521
Sleep bit
write
Sleep