edd51163dbh-ls Elpida Memory, Inc., edd51163dbh-ls Datasheet - Page 34

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edd51163dbh-ls

Manufacturer Part Number
edd51163dbh-ls
Description
512m Bits Ddr Mobile Ram
Manufacturer
Elpida Memory, Inc.
Datasheet
A Read Command to the Consecutive Write Command Interval with the BST Command
1. Same
2. Same
3. Different
Preliminary Data Sheet E1433E21 (Ver. 2.1)
Command
Destination row of the consecutive write
command
Bank
address
DQS
/CK
DM
DQ
CK
Row address State
Same
Different
Any
READ
High-Z
t0
BST
ACTIVE
ACTIVE
IDLE
t1
tBSTW ( tBSTZ)
READ to WRITE Command Interval
t2
Operation
Issue the BST command. tBSTW (≥ tBSTZ) after the BST command, the
consecutive write command can be issued.
Precharge the bank to interrupt the preceding read operation. tRP after the
precharge command, issue the ACT command. tRCD after the ACT command, the
consecutive write command can be issued. See ‘A read command to the
consecutive precharge interval’ section.
Issue the BST command. tBSTW (≥ tBSTZ) after the BST command, the
consecutive write command can be issued.
Precharge the bank independently of the preceding read operation. tRP after the
precharge command, issue the ACT command. tRCD after the ACT command, the
consecutive write command can be issued.
OUTPUT
tBSTZ (= CL)
NOP
out0 out1
t3
34
WRIT
t4
in0
t5
in1
INPUT
in2
t6
NOP
EDD51163DBH-LS
in3
t7
BL = 4
CL = 3
t8

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