UPD70208HGF-12-3B9 NEC [NEC], UPD70208HGF-12-3B9 Datasheet - Page 65
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UPD70208HGF-12-3B9
Manufacturer Part Number
UPD70208HGF-12-3B9
Description
V40HLTM, V50HLTM 16/8, 16-BIT MICROPROCESSOR
Manufacturer
NEC [NEC]
Datasheet
1.UPD70208HGF-12-3B9.pdf
(110 pages)
- Current page: 65 of 110
- Download datasheet (618Kb)
Instruc-
tion
Group
Instruc-
tion
Group
* DS0:, DS1:, PS:, and SS:.
HALT
POLL
DI
EI
BUSLOCK
FPO1
FPO2
NOP
*
RETEM
CALLN
Mnemonic
Mnemonic
fp-op
fp-op, mem
fp-op
fp-op, mem
imm8
Operand(s)
Operand(s)
7 6 5 4 3 2 1 0
1 1 1 1 0 1 0 0
1 0 0 1 1 0 1 1
1 1 1 1 1 0 1 0
1 1 1 1 1 0 1 1
1 1 1 1 0 0 0 0
1 1 0 1 1 X X X
1 1 0 1 1 X X X
0 1 1 0 0 1 1 X
0 1 1 0 0 1 1 X
1 0 0 1 0 0 0 0
0 0 1 sreg 1 1 0
7 6 5 4 3 2 1 0
1 1 1 0 1 1 0 1
1 1 1 0 1 1 0 1
Operation Code
Operation Code
7 6 5 4 3 2 1 0
1 1 Y Y Y Z Z Z
mod Y Y Y mem
1 1 Y Y Y Z Z Z
mod Y Y Y mem
7 6 5 4 3 2 1 0
1 1 1 1 1 1 0 1
1 1 1 0 1 1 0 1
Bytes
Bytes
2-4
2-4
1
1
1
1
1
2
2
1
1
2
3
2 + 5n
V40HL V50HL
V40HL V50HL
Clock Cycles
Clock Cycles
14
14
39
58
2
2
2
2
2
2
3
2
2 + 5n
10/14
10/14
27/39
38/58
2
2
2
2
2
2
3
2
CPU Halt
Poll and wait
IE
IE
Bus Lock Prefix
No Operation
data bus
No Operation
data bus
No Operation
Segment override prefix
PC
PSW
disabled
TA
SP
SP
SP
0
1
(4n + 1, 4n), TC
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
SP – 2, (SP + 1, SP)
(SP + 1, SP), PS
(SP + 5, SP + 4), SP
(mem)
(mem)
n: Number of times POLL pin is sampled
Operation
Operation
(4n + 3, 4n + 2)
(SP + 3, SP + 2),
PSW, MD
PS, PS
PC, PC
SP + 6, MD is set to write
TC
TA
1
n = imm8
AC CY V
AC CY V
R R R R R R
Flags
Flags
P
P
S
S
Z
Z
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