DS2465 MAXIM [Maxim Integrated Products], DS2465 Datasheet - Page 10

• Manufacturer Part Number: DS2465
• Description: SHA-256 Coprocessor with 1-Wire Master Function
• Manufacturer: MAXIM [Maxim Integrated Products]

Figure 3. Low-Impedance Pullup Timing
Bit 1: 1-Wire Power-Down (PDN). The PDN bit is used to remove power from the 1-Wire port, e.g., to force a 1-Wire
slave to perform a power-on reset. PDN interacts with the sleep mode, which is controlled by the SLPZ pin
The default state of PDN is 0, enabling normal operation. When PDN is changed to 1, no 1-Wire communication is
possible. To end the 1-Wire power-down state, the PDN bit needs to be changed to 0. To exit the DS2465 from sleep
mode, change the SLPZ pin state from 0 to 1. This forces the DS2465 to perform a power-on reset and clears PDN to
0 for normal operation.
Table 4. Interaction of PDN and SLPZ
Bit 0: Active Pullup (APU). The APU bit controls whether an active pullup (low impedance transistor) or a passive
pullup (R
mode). Enabling active pullup is generally recommended for best 1-Wire performance. The active pullup does not apply
to the rising edge of a recovery after a short on the 1-Wire line. If enabled, a fixed-duration active pullup (nominally
2.5Fs standard speed, 0.5Fs overdrive speed) also applies in a reset/presence detect cycle on the rising edges after
t
The circuit that controls rising edges
ends. From this point on the 1-Wire line is pulled high through R
of the 1-Wire line determine the slope. In case that active pullup is disabled (APU = 0), the resistive pullup continues,
as represented by the solid line. With active pullup enabled (APU = 1), and when at t
V
pullup remains active until the end of the time slot (t
of the active pullup is t
slot. In a read data time slot, the active pullup duration is slave dependent. See the strong pullup (SPU) section for a
way to keep the pullup transistor conducting beyond t
RSTL
SHA-256 Coprocessor with 1-Wire Master Function
IAPO
PDN is 0
PDN is 1
and after t
threshold, the DS2465 activates a low-impedance pullup transistor, as represented by the dashed line. The active
V
IAPO
V
CC
0V
WPU
resistor) is used to drive a 1-Wire line from low to high. When APU = 0, active pullup is disabled (resistor
• R
• The DS2465 is powered down (sleep mode).
PDL
IO is at 0V, causing the slaves to lose power.
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WPU
.
REC0
is disconnected;
DS2465 RESISTIVE PULLUP
LAST BIT OF 1-Wire WRITE BYTE, 1-Wire READ BYTE, OR 1-Wire SINGLE BIT FUNCTION
SLPZ PIN IS AT LOGIC 0
in a write-zero time slot and the longest duration is t
(Figure
WRITE-ONE CASE
4) operates as follows: At t
t
SLOT
WRITE-ZERO CASE
3
), after which the resistive pullup continues. The shortest duration
3
.
DS2465 PULLDOWN
WPU
internal to the DS2465. V
• R
• The DS2465 is powered up (normal operation).
• R
• The DS2465 is powered up.
IO is at V
IO is at 0V, causing the slaves to lose power.
WPU
WPU
1
, the pulldown (from DS2465 or 1-Wire slave)
is connected;
is disconnected;
CC
, keeping the slaves powered.
W0L
SLPZ PIN IS AT LOGIC 1
+ t
REC0
2
the voltage has reached the
DS2465 STRONG PULLUP
CC
- t
and the capacitive load
W1L
in a write-one time
DS2465
NEXT
TIME SLOT
(Table
4).