DS1643-120 DALLAS [Dallas Semiconductor], DS1643-120 Datasheet - Page 2

• Manufacturer Part Number: DS1643-120
• Description: Nonvolatile Timekeeping RAM
• Manufacturer: DALLAS [Dallas Semiconductor]

PIN DESCRIPTION
A0–A12
CE
OE
WE
NC
V
GND
DQ0-DQ7
CLOCK OPERATIONS–READING THE
CLOCK
While the double buffered register structure reduces the
chance of reading incorrect data, internal updates to the
DS1643 BLOCK DIAGRAM Figure 1
DS1643
041697 2/11
CC
32.768 KHz
V
BAT
+
– Address Input
– Chip Enable
– Output Enable
– Write Enable
– No Connection
– +5 Volts
– Ground
– Data Input/Output
CLOCK COUNTDOWN
WRITE PROTECTION
POWER MONITOR,
OSCILLATOR AND
SWITCHING, AND
CHAIN
V
CC
POWER GOOD
DS1643 clock registers should be halted before clock
data is read to prevent reading of data in transition.
However, halting the internal clock register updating
process does not affect clock accuracy. Updating is
halted when a one is written into the read bit, the seventh
most significant bit in the control register. As long as a
one remains in that position, updating is halted. After a
halt is issued, the registers reflect the count, that is day,
date, and time that was current at the moment the halt
command was issued. However, the internal clock reg-
isters of the double buffered system continue to update
so that the clock accuracy is not affected by the access
of data. All of the DS1643 registers are updated simul-
taneously after the clock status is reset. Updating is
within a second after the read bit is written to zero.
8K X 8 NV SRAM
REGISTERS
CLOCK
DQ0–DQ7
A0–A12
WE
CE
OE