DS2704G+ MAXIM [Maxim Integrated Products], DS2704G+ Datasheet - Page 9
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DS2704G+
Manufacturer Part Number
DS2704G+
Description
1280-Bit EEPROM with SHA-1 Authentication
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
1.DS2704G.pdf
(18 pages)
EEPROM STATUS
The DS2704 has a separate 8-byte linear address space for access to the EEPROM Status data field using the
Read Status and Write Status Function Commands.
READ STATUS [AAh]
The Read Status command is used to read data from the EEPROM Status data field. The bus master follows the
command byte with a 2-byte address (TA1=(T7:T0), TA2=(T15:T8)) that indicates a starting byte location within the
data field. An 8-bit CRC of the command byte and address bytes is computed by the DS2704 and read back by the
bus master to confirm that the correct command word and starting address were received. If the CRC is deemed to
be incorrect by the bus master, a reset pulse should be issued and the entire sequence repeated. If the CRC is
deemed to be correct by the bus master, read time slots can be issued to receive data starting at the initial
address. The bus master can issue a reset pulse at any point or continue to issue read time slots until the end of
the EEPROM Status data field is reached. If reading occurs through the end of the EEPROM Status data field, the
bus master can issue eight additional read time slots and the DS2704 will respond with a 8-bit CRC of all data
bytes read from the initial starting byte through the last byte. Additional read time slots return logical 1’s. The Read
Status command sequence can be ended at any point by issuing a reset pulse.
Table 5. EEPROM Status Field
* One time write to “0”
WRITE STATUS [55h]
The Write Status command is used to program the EEPROM Status data field. Only the Write Protect Page bits at
address 0000h are writable. The other bytes are factory programmed to the values in Table 5. The Write Protect
Page bits are set to logical 1’s when received from the factory. EEPROM page data can be programmed multiple
times until its associated Write Protect Page bit is programmed to a logical 0. Once a Write Protect Page bit is
programmed to a logical 0, it cannot be programmed back to a logical 1. Programming a Write Protect Page bit to a
logical 0 prevents any future modification or overwriting of the data in the associated page.
To protect page data from modification, the bus master writes the Write Status function command followed by one
byte of status data containing the Write Protect Page bits (B7:B0). The status data must be written least significant
bit to most significant bit, that is B0 to B7. Once the eighth bit of the status data is completed, the write operation
cannot be undone. If the write operation is abandoned prior to completing the status data byte, the entire write
sequence must be repeated after issuing a reset pulse.
ADDRESS (HEX)
0005-0006
0000
0001
0002
0003
0004
0007
Write Protect Page bits
Factory Programmed to FFh
Factory Programmed to FFh
Factory Programmed to FFh
Factory Programmed to FFh
Reserved
Factory Programmed to 00h
B0: Page 0 Write Protect
B1: Page 1 Write Protect
B2: Page 2 Write Protect
B3: Page 3 Write Protect
B4: Page 4 Write Protect
B5: Reserved for TMEX
B6: Reserved for TMEX
B7: Reserved for TMEX
DESCRIPTION
9 of 18
READ/WRITE
R/W*
R
R
R
R
R
R