DS1876T+TR MAXIM [Maxim Integrated Products], DS1876T+TR Datasheet - Page 47

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DS1876T+TR

Manufacturer Part Number
DS1876T+TR
Description
SFP Controller with Dual LDD Interface
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
Table 02h, Register 88h: CNFGA
88h
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
QTHEXT2
BIT 7
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
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SFP Controller with Dual LDD Interface
QTHEXT2: QT high extension for transmitter 2.
0 = Disabled. TXP HI and HBIAS QT alarms of transmitter 2 immediately create FETG.
1 = (default) Enabled. TXP HI and HBIAS QT alarms of transmitter 2 do not create FETG until the
timeout of the TXD
QTHEXT1: QT high extension for transmitter 1.
0 = Disabled. TXP HI and HBIAS QT alarms of transmitter 1 immediately create FETG.
1 = (default) Enabled. TXP HI and HBIAS QT alarms of transmitter 1 do not create FETG until the
timeout of the TXD
RESERVED
ASEL: Address select.
0 = (default) Device address is A2h for transmitter 1 and B2h for transmitter 2.
1 = The DEVICE ADDRESS register (Table 02h, Register 8Bh) is used to determine the main device
address.
MASK:
0 = (default) Alarm-enable row exists at Table 01h, Registers F8h–FFh. Table 05h, Registers F8h–
FFh are empty.
1 = Alarm-enable row exists at Table 05h, Registers F8h–FFh. Table 01h, Registers F8h–FFh are
empty.
INVRSOUT: Allow for inversion of the RSELOUT pin (see Figure 10).
0 = (default) RSELOUT is not inverted.
1 = RSELOUT is inverted.
INVTXFOUT2: Allow for inversion of signal driven by the TXF2 input pin.
0 = (default) TXF2 signal is not inverted.
1 = TXF2 signal is inverted.
INVTXFOUT1: Allow for inversion of signal driven by the TXF1 input pin.
0 = (default) TXF1 signal is not inverted.
1 = TXF1 signal is inverted.
QTHEXT1
C0h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
PW2 or (PW1 and RWTBL2)
Common A2h and B2h memory location
Nonvolatile (SEE)
RESERVED
EXT
EXT
time interval.
time interval.
ASEL
MASK
INVRSOUT
INVTXFOUT2
INVTXFOUT1
BIT 0
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