CY28317ZC-2T SPECTRALINEAR [SpectraLinear Inc], CY28317ZC-2T Datasheet - Page 14

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CY28317ZC-2T

Manufacturer Part Number
CY28317ZC-2T
Description
Manufacturer
SPECTRALINEAR [SpectraLinear Inc]
Datasheet
Rev 1.0, November 25, 2006
Table 7. Register Summary (continued)
How to Program CPU Output Frequency
When the programmable output frequency feature is enabled
(Pro_Freq_EN bit is set), the CPU output frequency is deter-
mined by the following equation:
Fcpu = G * (N+3)/(M+3)
“N” and “M” are the values programmed in Programmable
Frequency Select N-Value register and M-Value register,
respectively.
Table 8. Examples of N and M Value for Different CPU Frequency Range
WD_TIMER[4:0]
WD_PRE_SCALER
RST_EN_WD
RST_EN_FC
130 MHz – 248 MHz
Frequency Ranges
50 MHz – 129 MHz
Name
These bits store the time-out value of the Watchdog Timer. The scale of the timer is determine by the
prescaler.
The timer can support a value of 150 ms to 4.8 sec when the prescaler is set to 150 ms. If the prescaler
is set to 2.5 sec, it can support a value from 2.5 sec to 80 sec.
When the Watchdog Timer reaches “0,” it will set the WD_TO_STATUS bit.
0 = 150 ms
1 = 2.5 sec
This bit will enable the generation of a Reset pulse when a watchdog timer time-out occurs.
0 = Disabled
1 = Enabled
This bit will enable the generation of a Reset pulse after a frequency change occurs.
0 = Disabled
1 = Enabled
Gear Constants
48.00741
48.00741
M-Value Register
Fixed Value for
93
45
“G” stands for the PLL Gear Constant, which is determined by
the programmed value of FS[4:0] or SEL[4:0]. The value is
listed in Table 4.
The ratio of (N+3) and (M+3) need to be greater than “1”
[(N+3)/(M+3) > 1].
The following table lists set of N and M values for different
frequency output ranges.This example uses a fixed value for
the M-Value register and selects the CPU output frequency by
changing the value of the N-Value register.
Description
for Different CPU Frequency
Range of N-Value Register
127–245
97–255
CY28317-2
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