88e3016 Marvell Semiconductor, Inc., 88e3016 Datasheet - Page 10
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88e3016
Manufacturer Part Number
88e3016
Description
Integrated 10/100 Fast Ethernet Transceiver
Manufacturer
Marvell Semiconductor, Inc.
Datasheet
1.88E3016.pdf
(106 pages)
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Table 1:
Doc. No. MV-S103164-00, Rev. --
Page 10
88 E3016
60
63
62
61
59
58
53
49
55
54
51
50
RGMII Interface
Pin N ame
TX_CLK/TXC
TX_CTRL/TX_CTL
TXD[3]/TD[3]
TXD[2]/TD[2]
TXD[1]/TD[1]
TXD[0]/TD[0]
RX_CLK/RXC
RX_CTRL/
RX_CTL
RXD[3]/RD[3]
RXD[2]/RD[2]
RXD[1]/RD[1]
RXD[0]/RD[0]
88E3016
Integrated 10/100 Fast Ethernet Transceiver
Document Classification: Proprietary Information
Ty pe
I
I
I
O
O
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CONFIDENTIAL
Des cription
RGMII Transmit Clock provides a 25 MHz or 2.5 MHz reference
clock with ± 50 ppm tolerance depending on speed. In RGMII
mode, TX_CLK is used as TXC.
RGMII Transmit Control. TX_EN is presented on the rising edge of
TX_CLK. In RGMII mode, TX_CTRL is used as TX_CTL.
A logical derivative of TX_EN and TX_ER is presented on the fall-
ing edge of TX_CLK.
RGMII Transmit Data. In RGMII mode, TXD[3:0] are used as
TD[3:0].
The transmit data nibble is presented on TXD[3:0] on the rising
edge of TX_CLK.
RGMII Receive Clock provides a 25 MHz or 2.5 MHz reference
clock with ± 50 ppm tolerance derived from the received data
stream depending on speed. In RGMII mode, RX_CLK is used as
RXC.
RGMII Receive Control. RX_DV is presented on the rising edge of
RX_CLK. In RGMII mode, RX_CTRL is used as RX_CTL.
A logical derivative of RX_DV and RX_ER is presented on the fall-
ing edge of RX_CLK.
RGMII Receive Data. In RGMII mode, RXD[3:0] are used as
RD[3:0].
The receive data nibble is presented on RXD[3:0] on the rising
edge of RX_CLK.
Copyright © 2006 Marvell
May 4, 2006, Advance