88e3016 Marvell Semiconductor, Inc., 88e3016 Datasheet - Page 29
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88e3016
Manufacturer Part Number
88e3016
Description
Integrated 10/100 Fast Ethernet Transceiver
Manufacturer
Marvell Semiconductor, Inc.
Datasheet
1.88E3016.pdf
(106 pages)
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The 3 bits for each CONFIG pin are mapped as shown in
Each bit in the configuration is defined as shown in
Copyright © 2006 Marvell
May 4, 2006, Advance
Table 17:
B its
PHYAD[4:0]
ENA_XC
MODE[2:0]
88E3016 Configuration Definition
Table 16:
P in
CONFIG[0]
CONFIG[1]
CONFIG[2]
CONFIG[3]
D e f i n i t i o n
PHY Address
0 = Default Disable Auto-Crossover
1 = Default Enable Auto-Crossover
000 = Copper - RGMII, Receive clock transition when data transi-
001 = Copper - RGMII, Receive clock transition when data stable
010 = Fiber - RGMII, Receive clock transition when data transitions
111 = Fiber - RGMII, Receive clock transition when data stable
tions
Configuration Mapping
Document Classification: Proprietary Information
B i t 2
Reserved
Reserved
Reserved
MODE[2]
CONFIDENTIAL
Table
17.
Table
B i t 1
ENA_XC
MODE[1]
PHYAD[1]
PHYAD[3]
16.
B i t 0
PHYAD[0]
PHYAD[2]
PHYAD[4]
MODE[0]
Doc. No. MV-S103164-00, Rev. --
B i ts A f f e c t e d
None
16.5:4
In 100BASE-FX mode,
this should be disabled.
28.11:10, 28.3
Hardware Configuration
Page 29
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