k9k8g08u0m-y Samsung Semiconductor, Inc., k9k8g08u0m-y Datasheet - Page 48
k9k8g08u0m-y
Manufacturer Part Number
k9k8g08u0m-y
Description
1g X 8 Bit / 2g X 8 Bit Nand Flash Memory
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K9K8G08U0M-Y.pdf
(49 pages)
- Current page: 48 of 49
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READY/BUSY
The device has a R/B output that provides a hardware method of indicating the completion of a page program, erase and random
read completion. The R/B pin is normally high but transitions to low after program or erase command is written to the command regis-
ter or random read is started after address loading. It returns to high when the internal controller has finished the operation. The pin is
an open-drain driver thereby allowing two or more R/B outputs to be Or-tied. Because pull-up resistor value is related to tr(R/B) and
current drain during busy(ibusy) , an appropriate value can be obtained with the following reference chart(Fig.20). Its value can be
determined by the following guidance.
K9WAG08U1M
K9K8G08U0M
V
CC
GND
Rp value guidance
Rp(min, 3.3V part) =
Rp(max) is determined by maximum permissible limit of tr
Device
open drain output
R/B
where I
50n
150n
100n
Rp
V
L
Figure 20. Rp vs tr ,tf & Rp vs ibusy
CC
is the sum of the input currents of all devices tied to the R/B pin.
(Max.) - V
ibusy
I
OL
C
+ I
L
2.4
1K
50
1.8
x x x x
OL
@ Vcc = 3.3V, Ta = 25
L
(Max.)
Ibusy
tf
Ready Vcc
tr
100
x x x x
1.2
2K
1.8
=
Rp(ohm)
48
tf
150
x x x x
x x
0.8
3K
8mA + I
1.8
3.3V device - V
C , C
3.2V
VOL
L
L
= 50pF
0.6
200
1.8
4K
x x
x x x x
Busy
OL
: 0.4V, V
2m
3m
1m
FLASH MEMORY
OH
: 2.4V
tr
Preliminary
VOH
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